tools/litex_json2dts: fix vexriscv-smp cpu reg numbering.

This commit is contained in:
Florent Kermarrec 2020-12-21 18:16:44 +01:00
parent 5ec5554713
commit ef2ed8bbbc

View file

@ -72,7 +72,7 @@ def generate_dts(d):
compatible = "riscv"; compatible = "riscv";
riscv,isa = "rv32ima"; riscv,isa = "rv32ima";
mmu-type = "riscv,sv32"; mmu-type = "riscv,sv32";
reg = <0>; reg = <{cpu}>;
status = "okay"; status = "okay";
L{irq}: interrupt-controller {{ L{irq}: interrupt-controller {{
#interrupt-cells = <0x00000001>; #interrupt-cells = <0x00000001>;