mirror of
https://github.com/enjoy-digital/litex.git
synced 2025-01-04 09:52:26 -05:00
tools/litex_json2dts: fix vexriscv-smp cpu reg numbering.
This commit is contained in:
parent
5ec5554713
commit
ef2ed8bbbc
1 changed files with 1 additions and 1 deletions
|
@ -72,7 +72,7 @@ def generate_dts(d):
|
||||||
compatible = "riscv";
|
compatible = "riscv";
|
||||||
riscv,isa = "rv32ima";
|
riscv,isa = "rv32ima";
|
||||||
mmu-type = "riscv,sv32";
|
mmu-type = "riscv,sv32";
|
||||||
reg = <0>;
|
reg = <{cpu}>;
|
||||||
status = "okay";
|
status = "okay";
|
||||||
L{irq}: interrupt-controller {{
|
L{irq}: interrupt-controller {{
|
||||||
#interrupt-cells = <0x00000001>;
|
#interrupt-cells = <0x00000001>;
|
||||||
|
|
Loading…
Reference in a new issue