dvisampler: support differential input

This commit is contained in:
Sebastien Bourdeauducq 2013-07-04 19:18:24 +02:00
parent 22e25347fe
commit eff7882721
2 changed files with 24 additions and 6 deletions

View File

@ -19,6 +19,14 @@ class DVISampler(Module, AutoCSR):
for datan in range(3): for datan in range(3):
name = "data" + str(datan) name = "data" + str(datan)
invert = False invert = False
if hasattr(pads, name + "_p"):
s = Signal()
self.specials += Instance("IBUFDS",
Instance.Input("I", getattr(pads, name + "_p")),
Instance.Input("IB", getattr(pads, name + "_n")),
Instance.Output("O", s)
)
else:
try: try:
s = getattr(pads, name) s = getattr(pads, name)
except AttributeError: except AttributeError:

View File

@ -16,6 +16,16 @@ class Clocking(Module, AutoCSR):
### ###
if hasattr(pads, "clk_p"):
clkin = Signal()
self.specials += Instance("IBUFDS",
Instance.Input("I", pads.clk_p),
Instance.Input("IB", pads.clk_n),
Instance.Output("O", clkin)
)
else:
clkin = pads.clk
clkfbout = Signal() clkfbout = Signal()
pll_locked = Signal() pll_locked = Signal()
pll_clk0 = Signal() pll_clk0 = Signal()
@ -39,7 +49,7 @@ class Clocking(Module, AutoCSR):
Instance.Output("CLKOUT3", pll_clk3), Instance.Output("CLKOUT3", pll_clk3),
Instance.Output("LOCKED", pll_locked), Instance.Output("LOCKED", pll_locked),
Instance.Input("CLKFBIN", clkfbout), Instance.Input("CLKFBIN", clkfbout),
Instance.Input("CLKIN", pads.clk), Instance.Input("CLKIN", clkin),
Instance.Input("RST", self._r_pll_reset.storage) Instance.Input("RST", self._r_pll_reset.storage)
) )