bfm: fix HDD read_dma_cmd, identify_dma_cmd and clean up
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parent
623a3883c6
commit
f01a8934f2
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@ -418,10 +418,14 @@ class HDD(Module):
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return FIS_DMA_ACTIVATE_D2H()
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return FIS_DMA_ACTIVATE_D2H()
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def read_dma_cmd(self, fis):
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def read_dma_cmd(self, fis):
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return FIS_DATA(self.read_mem(fis.lba_lsb, fis.count*4))
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packet = self.read_mem(fis.lba_lsb, fis.count*4)
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packet.insert(0, 0)
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return FIS_DATA(packet)
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def identify_dma_cmd(self, fis):
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def identify_dma_cmd(self, fis):
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return FIS_DATA([i for i in range(256)])
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packet = [i for i in range(256)]
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packet.insert(0, 0)
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return FIS_DATA(packet)
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def data_cmd(self, fis):
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def data_cmd(self, fis):
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self.write_mem(self.wr_address, fis.packet[1:])
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self.write_mem(self.wr_address, fis.packet[1:])
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@ -431,13 +435,13 @@ class HDD(Module):
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self.mem = HDDMemRegion(base, length)
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self.mem = HDDMemRegion(base, length)
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def write_mem(self, adr, data):
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def write_mem(self, adr, data):
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# XXX test if adr allocate in one memory region
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# XXX test if adr allocated in one memory region
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current_adr = (adr-self.mem.base)//4
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current_adr = (adr-self.mem.base)//4
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for i in range(len(data)):
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for i in range(len(data)):
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self.mem.data[current_adr+i] = data[i]
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self.mem.data[current_adr+i] = data[i]
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def read_mem(self, adr, length=1):
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def read_mem(self, adr, length=1):
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# XXX test if adr allocate in one memory region
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# XXX test if adr allocated in one memory region
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current_adr = (adr-self.mem.base)//4
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current_adr = (adr-self.mem.base)//4
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data = []
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data = []
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for i in range(length//4):
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for i in range(length//4):
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