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cores/cpu: rename eos-s3 to eos_s3 for compatibility

This commit is contained in:
Ilia Sergachev 2022-01-15 17:16:48 +01:00
parent 00dfaa1740
commit f07fb4e1e3
3 changed files with 4 additions and 4 deletions
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2
litex/soc/cores/cpu/__init__.py
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@ -136,7 +136,7 @@ CPUS = {
"zynq7000" : Zynq7000, "zynq7000" : Zynq7000,
# EOS-S3 # EOS-S3
"eos-s3" : EOS_S3, "eos_s3" : EOS_S3,
# Gowin EMCU # Gowin EMCU
'gowin_emcu' : GowinEMCU 'gowin_emcu' : GowinEMCU

4
litex/soc/cores/cpu/eos_s3/core.py
View File

@ -20,8 +20,8 @@ class Open(Signal): pass
class EOS_S3(CPU): class EOS_S3(CPU):
variants = ["standard"] variants = ["standard"]
family = "arm" family = "arm"
name = "eos-s3" name = "eos_s3"
human_name = "eos-s3" human_name = "EOS S3"
data_width = 32 data_width = 32
endianness = "little" endianness = "little"
reset_address = 0x00000000 reset_address = 0x00000000

2
litex/soc/integration/soc_core.py
View File

@ -158,7 +158,7 @@ class SoCCore(LiteXSoC):
integrated_rom_size = 4*len(integrated_rom_init) integrated_rom_size = 4*len(integrated_rom_init)
# Disable ROM when no CPU/hard-CPU. # Disable ROM when no CPU/hard-CPU.
if cpu_type in [None, "zynq7000", "eos-s3"]: if cpu_type in [None, "zynq7000", "eos_s3"]:
integrated_rom_init = [] integrated_rom_init = []
integrated_rom_size = 0 integrated_rom_size = 0
self.integrated_rom_size = integrated_rom_size self.integrated_rom_size = integrated_rom_size