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soc/init_rom: Add SoCError when ROM Size < Contents Size and cosmetic cleanups.

This commit is contained in:
Florent Kermarrec 2024-04-02 09:12:03 +02:00
parent 0601bf51c4
commit f181eabebb
1 changed files with 9 additions and 2 deletions
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11
litex/soc/integration/soc.py
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@ -1050,7 +1050,7 @@ class SoC(LiteXModule, SoCCoreCompat):
address_width = self.bus.address_width,
bursting = self.bus.bursting
)
ram = ram_cls(size, bus=ram_bus, init=contents, read_only=("w" not in mode), name=name)
ram = ram_cls(size, bus=ram_bus, init=contents, read_only=("w" not in mode), name=name)
self.bus.add_slave(name=name, slave=ram.bus, region=SoCRegion(origin=origin, size=size, mode=mode))
self.check_if_exists(name)
self.logger.info("RAM {} {} {}.".format(
@ -1068,8 +1068,15 @@ class SoC(LiteXModule, SoCCoreCompat):
self.logger.info("Initializing ROM {} with contents (Size: {}).".format(
colorer(name),
colorer(f"0x{4*len(contents):x}")))
if self.bus.regions[name].size < 4*len(contents):
self.logger.error("Contents Size ({}) {} ROM Size ({}).".format(
colorer(f"0x{4*len(contents):x}"),
colorer("exceeds", color="red"),
colorer(f"0x{self.bus.regions[name].size:x}"),
))
raise SoCError()
getattr(self, name).mem.init = contents
if auto_size and "w" not in self.bus.regions[name].mode:
if auto_size and ("w" not in self.bus.regions[name].mode):
self.logger.info("Auto-Resizing ROM {} from {} to {}.".format(
colorer(name),
colorer(f"0x{self.bus.regions[name].size:x}"),