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soc: increase default BIOS size

This commit is contained in:
Sebastien Bourdeauducq 2015-07-28 22:36:42 +08:00
parent 5e6178598c
commit f2eff4d10e
1 changed files with 1 additions and 1 deletions
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2
misoclib/soc/__init__.py
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@ -146,7 +146,7 @@ class SoC(Module):
if size is not None: if size is not None:
self.add_memory_region(name, address, size) self.add_memory_region(name, address, size)
def register_rom(self, interface, rom_size=0xa000): def register_rom(self, interface, rom_size=0x10000):
self.add_wb_slave(mem_decoder(self.mem_map["rom"]), interface) self.add_wb_slave(mem_decoder(self.mem_map["rom"]), interface)
self.add_memory_region("rom", self.cpu_reset_address, rom_size) self.add_memory_region("rom", self.cpu_reset_address, rom_size)