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README: cleanup

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Florent Kermarrec 2018-02-23 14:15:41 +01:00
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README
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@ -11,7 +11,11 @@
-------- --------
LiteX is an alternative to MiSoC maintained and used by Enjoy-Digital to build LiteX is an alternative to MiSoC maintained and used by Enjoy-Digital to build
our cores, integrate them in complete SoC and load/flash them to the hardware our cores, integrate them in complete SoC and load/flash them to the hardware
and experiment new features. and experiment new features. (structure is kept close to MiSoC to ease
collaboration)
Typical LiteX design flow:
--------------------------
+---------------+ +---------------+
|FPGA toolchains| |FPGA toolchains|
@ -26,15 +30,12 @@ and experiment new features.
+----------------------+ | | +----------------------+ | |
|LiteX Cores Ecosystem +--> | |LiteX Cores Ecosystem +--> |
+----------------------+ +-^-------^-+ +----------------------+ +-^-------^-+
(Eth,,SATA,,DRAM,,USB, | | (Eth, SATA, DRAM, USB, | |
PCIe,Video,etc...) + + PCIe, Video, etc...) + +
board target board target
file file file file
The structure of LiteX is kept close to MiSoC to ease collaboration between
projects.
[> Sub-packages [> Sub-packages
--------------- ---------------
gen: gen: