mirror of
https://github.com/enjoy-digital/litex.git
synced 2025-01-04 09:52:26 -05:00
new action syntax for make.py + support xc3sprog
This commit is contained in:
parent
e4273be517
commit
f55943ae18
4 changed files with 146 additions and 58 deletions
20
jtag.py
20
jtag.py
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@ -1,20 +0,0 @@
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import subprocess
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cables = {
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"mixxeo": "milkymist",
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"m1": "milkymist",
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"papilio_pro": "Flyswatter"
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}
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def load(platform_name, bitstream):
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cmds = """cable {cable}
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detect
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pld load {bitstream}
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quit
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""".format(cable=cables[platform_name], bitstream=bitstream)
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process = subprocess.Popen("jtag", stdin=subprocess.PIPE)
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process.stdin.write(cmds.encode("ASCII"))
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process.communicate()
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def flash(bitstream):
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subprocess.call(["m1nor-ng", bitstream])
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114
make.py
114
make.py
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@ -8,10 +8,30 @@ from migen.fhdl import simplify
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from misoclib.gensoc import cpuif
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from misoclib.s6ddrphy import initsequence
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import jtag
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import programmer
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def _get_args():
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parser = argparse.ArgumentParser(description="MiSoC - a high performance and small footprint SoC based on Migen.")
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parser = argparse.ArgumentParser(formatter_class=argparse.RawDescriptionHelpFormatter,
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description="""\
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MiSoC - a high performance and small footprint SoC based on Migen.
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This program builds and/or loads MiSoC components.
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One or several actions can be specified:
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build-bitstream build FPGA bitstream. Implies build-bios on targets with
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integrated BIOS.
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build-headers build software header files with CSR/IRQ/SDRAM_PHY definitions.
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build-csr-csv save CSR map into CSV file.
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build-bios build BIOS. Implies build-header.
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load-bitstream load bitstream into volatile storage.
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flash-bitstream load bitstream into non-volatile storage.
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flash-bios load BIOS into non-volatile storage.
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all build-bitstream, build-bios, flash-bitstream, flash-bios.
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Load/flash actions use the existing outputs, and do not trigger new builds.
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""")
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parser.add_argument("-p", "--platform", default="mixxeo", help="platform to build for")
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parser.add_argument("-t", "--target", default="mlabs_video", help="SoC type to build")
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@ -22,12 +42,8 @@ def _get_args():
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parser.add_argument("-d", "--decorate", default=[], action="append", help="apply simplification decorator to top-level")
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parser.add_argument("-Ob", "--build-option", default=[], nargs=2, action="append", help="set build option")
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parser.add_argument("-B", "--no-bitstream", default=False, action="store_true", help="do not build bitstream file")
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parser.add_argument("-H", "--no-header", default=False, action="store_true", help="do not build C header files with CSR/IRQ/SDRAM_PHY definitions")
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parser.add_argument("-c", "--csr-csv", default="", help="save CSR map into CSV file")
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parser.add_argument("-l", "--load", default=False, action="store_true", help="load bitstream to FPGA volatile memory")
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parser.add_argument("-f", "--flash", default=False, action="store_true", help="load bitstream to flash")
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parser.add_argument("action", nargs="+", help="specify an action")
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return parser.parse_args()
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@ -44,9 +60,10 @@ def _misoc_import(default, external, name):
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else:
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return importlib.import_module(default + "." + name)
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def main():
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if __name__ == "__main__":
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args = _get_args()
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# create top-level SoC object
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platform_module = _misoc_import("mibuild.platforms", args.external_platform, args.platform)
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target_module = _misoc_import("targets", args.external_target, args.target)
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platform = platform_module.Platform()
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@ -57,10 +74,33 @@ def main():
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build_name = top_class.__name__.lower() + "-" + args.platform
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top_kwargs = dict((k, autotype(v)) for k, v in args.target_option)
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soc = top_class(platform, **top_kwargs)
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soc.finalize()
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if not args.no_header:
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# decode actions
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action_list = ["build-bitstream", "build-headers", "build-csr-csv", "build-bios",
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"load-bitstream", "flash-bitstream", "flash-bios", "all"]
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actions = {k: False for k in action_list}
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for action in args.action:
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if action in actions:
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actions[action] = True
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else:
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print("Unknown action: "+action+". Valid actions are:")
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for a in action_list:
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print(" "+a)
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sys.exit(1)
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# dependencies
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if actions["all"]:
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actions["build-bitstream"] = True
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actions["build-bios"] = True
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actions["flash-bitstream"] = True
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actions["flash-bios"] = True
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if actions["build-bitstream"] and hasattr(soc, "init_bios_memory"):
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actions["build-bios"] = True
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if actions["build-bios"]:
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actions["build-headers"] = True
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if actions["build-headers"]:
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boilerplate = """/*
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* Platform: {}
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* Target: {}
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@ -75,38 +115,44 @@ def main():
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if hasattr(soc, "ddrphy"):
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sdram_phy_header = initsequence.get_sdram_phy_header(soc.ddrphy)
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write_to_file("software/include/generated/sdram_phy.h", boilerplate + sdram_phy_header)
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if args.csr_csv:
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if actions["build-csr-csv"]:
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csr_csv = cpuif.get_csr_csv(soc.csr_base, soc.csrbankarray)
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write_to_file(args.csr_csv, csr_csv)
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if hasattr(soc, "init_bios_memory"):
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if actions["build-bios"]:
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ret = subprocess.call(["make", "-C", "software/bios"])
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if ret:
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raise OSError("BIOS build failed")
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bios_file = open("software/bios/bios.bin", "rb")
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bios_data = []
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while True:
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w = bios_file.read(4)
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if not w:
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break
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bios_data.append(struct.unpack(">I", w)[0])
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bios_file.close()
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if hasattr(soc, "init_bios_memory"):
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with open("software/bios/bios.bin", "rb") as bios_file:
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bios_data = []
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while True:
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w = bios_file.read(4)
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if not w:
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break
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bios_data.append(struct.unpack(">I", w)[0])
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soc.init_bios_memory(bios_data)
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for decorator in args.decorate:
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soc = getattr(simplify, decorator)(soc)
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if not args.no_bitstream:
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if actions["build-bitstream"]:
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for decorator in args.decorate:
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soc = getattr(simplify, decorator)(soc)
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build_kwargs = dict((k, autotype(v)) for k, v in args.build_option)
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platform.build(soc, build_name=build_name, **build_kwargs)
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subprocess.call(["tools/byteswap",
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"build/" + build_name + ".bin",
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"build/" + build_name + ".fpg"])
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if args.load:
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jtag.load(platform.name, "build/" + build_name + ".bit")
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if args.flash:
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jtag.flash("build/" + build_name + ".fpg")
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if __name__ == "__main__":
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main()
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if actions["load-bitstream"] or actions["flash-bitstream"] or actions["flash-bios"]:
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prog = programmer.create_programmer(platform.name, None)
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if actions["load-bitstream"]:
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prog.load_bitstream("build/" + build_name + ".bit")
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if actions["flash-bitstream"]:
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if prog.needs_bitreverse:
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flashbit = "build/" + build_name + ".fpg"
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subprocess.call(["tools/byteswap",
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"build/" + build_name + ".bin",
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flashbit])
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else:
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flashbit = "build/" + build_name + ".bin"
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prog.flash(0, flashbit)
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if actions["flash-bios"]:
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prog.flash(soc.cpu_reset_address, "software/bios/bios.bin")
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65
programmer.py
Normal file
65
programmer.py
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import subprocess
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import os
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class Programmer:
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def __init__(self, platform_name, flash_proxy_dir):
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self.platform_name = platform_name
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self.flash_proxy_dir = flash_proxy_dir
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def find_flash_proxy(self, name):
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if self.flash_proxy_dir is not None:
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search_dirs = [self.flash_proxy_dir]
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else:
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search_dirs = ["~/.mlabs", "/usr/local/share/mlabs", "/usr/share/mlabs"]
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for d in search_dirs:
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fulldir = os.path.abspath(os.path.expanduser(d))
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fullname = os.path.join(fulldir, name)
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if os.path.exists(fullname):
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return fullname
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raise OSError("Failed to find flash proxy bitstream")
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def _run_urjtag(cmds):
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with subprocess.Popen("jtag", stdin=subprocess.PIPE) as process:
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process.stdin.write(cmds.encode("ASCII"))
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process.communicate()
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class UrJTAG(Programmer):
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needs_bitreverse = True
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def load_bitstream(self, bitstream_file):
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cmds = """cable milkymist
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detect
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pld load {bitstream}
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quit
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""".format(bitstream=bitstream_file)
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_run_urjtag(cmds)
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def flash(self, address, data_file):
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flash_proxy = self.find_flash_proxy("fjmem-" + self.platform_name + ".bit")
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cmds = """cable milkymist
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detect
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pld load "{flash_proxy}"
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initbus fjmem opcode=000010
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frequency 6000000
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detectflash 0
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endian big
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flashmem "{address}" "{data_file}" noverify
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""".format(flash_proxy=flash_proxy, address=address, data_file=data_file)
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_run_urjtag(cmds)
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class XC3SProg(Programmer):
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needs_bitreverse = False
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def load_bitstream(self, bitstream_file):
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subprocess.call(["xc3sprog", "-c", "papilio", bitstream_file])
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def flash(self, address, data_file):
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flash_proxy = self.find_flash_proxy("bscan_spi_lx9_papilio.bit")
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subprocess.call(["xc3sprog", "-c", "papilio", "-I"+flash_proxy, "{}:w:0x{:x}:BIN".format(data_file, address)])
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def create_programmer(platform_name, *args, **kwargs):
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return {
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"mixxeo": UrJTAG,
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"m1": UrJTAG,
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"papilio_pro": XC3SProg
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}[platform_name](platform_name, *args, **kwargs)
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@ -40,10 +40,7 @@ libs:
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$(MAKE) -C $(MSCDIR)/software/libbase
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$(MAKE) -C $(MSCDIR)/software/libnet
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flash: bios.bin
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m1nor-ng bios.bin
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clean:
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$(RM) $(OBJECTS) $(OBJECTS:.o=.d) bios.elf bios.bin .*~ *~
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.PHONY: all main.o clean libs flash
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.PHONY: all main.o clean libs
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