soc/interconnect/stream: use reset_less attr of signal for payload and param
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@ -96,11 +96,14 @@ class Record:
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prefix = ""
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prefix = ""
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for f in self.layout:
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for f in self.layout:
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if isinstance(f[1], (int, tuple)): # cases 1/2
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if isinstance(f[1], (int, tuple)): # cases 1/2
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if(len(f) == 3):
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freset_less = False
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if(len(f) == 4):
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fname, fsize, fdirection, freset_less = f
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elif(len(f) == 3):
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fname, fsize, fdirection = f
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fname, fsize, fdirection = f
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else:
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else:
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fname, fsize = f
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fname, fsize = f
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finst = Signal(fsize, name=prefix + fname)
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finst = Signal(fsize, name=prefix + fname, reset_less=freset_less)
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elif isinstance(f[1], list): # case 3
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elif isinstance(f[1], list): # case 3
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fname, fsublayout = f
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fname, fsublayout = f
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finst = Record(fsublayout, prefix + fname)
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finst = Record(fsublayout, prefix + fname)
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@ -4,11 +4,11 @@ from litex.gen.genlib import fifo
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(DIR_SINK, DIR_SOURCE) = range(2)
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(DIR_SINK, DIR_SOURCE) = range(2)
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def _make_m2s(layout):
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def _make_m2s(layout, reset_less=False):
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r = []
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r = []
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for f in layout:
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for f in layout:
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if isinstance(f[1], (int, tuple)):
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if isinstance(f[1], (int, tuple)):
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r.append((f[0], f[1], DIR_M_TO_S))
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r.append((f[0], f[1], DIR_M_TO_S, reset_less))
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else:
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else:
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r.append((f[0], _make_m2s(f[1])))
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r.append((f[0], _make_m2s(f[1])))
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return r
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return r
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@ -34,8 +34,8 @@ class EndpointDescription:
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("ready", 1, DIR_S_TO_M),
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("ready", 1, DIR_S_TO_M),
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("first", 1, DIR_M_TO_S),
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("first", 1, DIR_M_TO_S),
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("last", 1, DIR_M_TO_S),
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("last", 1, DIR_M_TO_S),
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("payload", _make_m2s(self.payload_layout)),
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("payload", _make_m2s(self.payload_layout, True)),
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("param", _make_m2s(self.param_layout))
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("param", _make_m2s(self.param_layout, True))
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]
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]
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return full_layout
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return full_layout
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