bios/sdram: add memspeed
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@ -841,6 +841,51 @@ static int memtest_addr(void)
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return errors;
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}
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static void memspeed(void)
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{
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volatile unsigned int *array = (unsigned int *)MAIN_RAM_BASE;
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int i;
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unsigned int start, end;
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unsigned long write_speed;
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unsigned long read_speed;
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__attribute__((unused)) unsigned int data;
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/* init timer */
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timer0_en_write(0);
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timer0_reload_write(0);
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timer0_load_write(0xffffffff);
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timer0_en_write(1);
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/* write speed */
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timer0_update_value_write(1);
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start = timer0_value_read();
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for(i=0;i<MEMTEST_DATA_SIZE/4;i++) {
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array[i] = i;
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}
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timer0_update_value_write(1);
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end = timer0_value_read();
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write_speed = (8*MEMTEST_DATA_SIZE*(CONFIG_CLOCK_FREQUENCY/1000000))/(start - end);
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/* flush CPU and L2 caches */
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flush_cpu_dcache();
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#ifdef CONFIG_L2_SIZE
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flush_l2_cache();
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#endif
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/* read speed */
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timer0_en_write(1);
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timer0_update_value_write(1);
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start = timer0_value_read();
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for(i=0;i<MEMTEST_DATA_SIZE/4;i++) {
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data = array[i];
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}
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timer0_update_value_write(1);
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end = timer0_value_read();
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read_speed = (8*MEMTEST_DATA_SIZE*(CONFIG_CLOCK_FREQUENCY/1000000))/(start - end);
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printf("Memspeed Writes: %dMbps Reads: %dMbps\n", write_speed, read_speed);
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}
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int memtest(void)
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{
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int bus_errors, data_errors, addr_errors;
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@ -861,6 +906,7 @@ int memtest(void)
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return 0;
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else {
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printf("Memtest OK\n");
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memspeed();
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return 1;
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}
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}
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