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Merge pull request #339 from gsomlo/gls-csr-cleanup 

CSR Improvements and Cleanup
This commit is contained in:
enjoy-digital 2020-01-13 19:57:59 +01:00 committed by GitHub
parent f1606dbc72 b073ebadf6
commit f818755c9c
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GPG Key ID: 4AEE18F83AFDEB23
3 changed files with 297 additions and 136 deletions
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64
litex/soc/integration/export.py
View File

@ -136,44 +136,34 @@ def get_soc_header(constants, with_access_functions=True):
r += "\n#endif\n" r += "\n#endif\n"
return r return r
def _get_rw_functions_c(reg_name, reg_base, nwords, busword, alignment, read_only, with_access_functions): def _get_rw_functions_c(reg_name, reg_base, nwords, busword, read_only, with_access_functions):
r = "" r = ""
r += "#define CSR_"+reg_name.upper()+"_ADDR "+hex(reg_base)+"L\n" addr_str = "CSR_{}_ADDR".format(reg_name.upper())
r += "#define CSR_"+reg_name.upper()+"_SIZE "+str(nwords)+"\n" size_str = "CSR_{}_SIZE".format(reg_name.upper())
r += "#define {} {}L\n".format(addr_str, hex(reg_base))
r += "#define {} {}\n".format(size_str, nwords)
size = nwords*busword size = nwords*busword//8
if size > 64: if size > 8:
# FIXME: maybe implement some "memcpy-like" semantics for larger blobs?
return r return r
elif size > 32: elif size > 4:
ctype = "unsigned long long int" ctype = "uint64_t"
elif size > 16: elif size > 2:
ctype = "unsigned int" ctype = "uint32_t"
elif size > 8: elif size > 1:
ctype = "unsigned short int" ctype = "uint16_t"
else: else:
ctype = "unsigned char" ctype = "uint8_t"
if with_access_functions: if with_access_functions:
r += "static inline "+ctype+" "+reg_name+"_read(void) {\n" r += "static inline {} {}_read(void) {{\n".format(ctype, reg_name)
if size > 1: r += "\treturn _csr_rd((unsigned long *){}, {});\n}}\n".format(addr_str, size)
r += "\t"+ctype+" r = csr_readl("+hex(reg_base)+"L);\n"
for byte in range(1, nwords):
r += "\tr <<= "+str(busword)+";\n\tr |= csr_readl("+hex(reg_base+alignment//8*byte)+"L);\n"
r += "\treturn r;\n}\n"
else:
r += "\treturn csr_readl("+hex(reg_base)+"L);\n}\n"
if not read_only: if not read_only:
r += "static inline void "+reg_name+"_write("+ctype+" value) {\n" r += "static inline void {}_write({} v) {{\n".format(reg_name, ctype)
for word in range(nwords): r += "\t_csr_wr((unsigned long *){}, v, {});\n}}\n".format(addr_str, size)
shift = (nwords-word-1)*busword
if shift:
value_shifted = "value >> "+str(shift)
else:
value_shifted = "value"
r += "\tcsr_writel("+value_shifted+", "+hex(reg_base+alignment//8*word)+"L);\n"
r += "}\n"
return r return r
@ -186,12 +176,14 @@ def get_csr_header(regions, constants, with_access_functions=True):
if with_access_functions: if with_access_functions:
r += "#include <stdint.h>\n" r += "#include <stdint.h>\n"
r += "#ifdef CSR_ACCESSORS_DEFINED\n" r += "#ifdef CSR_ACCESSORS_DEFINED\n"
r += "extern void csr_writeb(uint8_t value, unsigned long addr);\n" r += "extern void csr_wr_uint8(uint8_t v, unsigned long a);\n"
r += "extern uint8_t csr_readb(unsigned long addr);\n" r += "extern void csr_wr_uint16(uint16_t v, unsigned long a);\n"
r += "extern void csr_writew(uint16_t value, unsigned long addr);\n" r += "extern void csr_wr_uint32(uint32_t v, unsigned long a);\n"
r += "extern uint16_t csr_readw(unsigned long addr);\n" r += "extern void csr_wr_uint64(uint64_t v, unsigned long a);\n"
r += "extern void csr_writel(uint32_t value, unsigned long addr);\n" r += "extern uint8_t csr_rd_uint8(unsigned long a);\n"
r += "extern uint32_t csr_readl(unsigned long addr);\n" r += "extern uint16_t csr_rd_uint16(unsigned long a);\n"
r += "extern uint32_t csr_rd_uint32(unsigned long a);\n"
r += "extern uint64_t csr_rd_uint64(unsigned long a);\n"
r += "#else /* ! CSR_ACCESSORS_DEFINED */\n" r += "#else /* ! CSR_ACCESSORS_DEFINED */\n"
r += "#include <hw/common.h>\n" r += "#include <hw/common.h>\n"
r += "#endif /* ! CSR_ACCESSORS_DEFINED */\n" r += "#endif /* ! CSR_ACCESSORS_DEFINED */\n"
@ -202,7 +194,7 @@ def get_csr_header(regions, constants, with_access_functions=True):
if not isinstance(region.obj, Memory): if not isinstance(region.obj, Memory):
for csr in region.obj: for csr in region.obj:
nr = (csr.size + region.busword - 1)//region.busword nr = (csr.size + region.busword - 1)//region.busword
r += _get_rw_functions_c(name + "_" + csr.name, origin, nr, region.busword, alignment, r += _get_rw_functions_c(name + "_" + csr.name, origin, nr, region.busword,
isinstance(csr, CSRStatus), with_access_functions) isinstance(csr, CSRStatus), with_access_functions)
origin += alignment//8*nr origin += alignment//8*nr
if hasattr(csr, "fields"): if hasattr(csr, "fields"):

144
litex/soc/software/bios/sdram.c
View File

@ -20,8 +20,6 @@
#include <hw/flags.h> #include <hw/flags.h>
#include <system.h> #include <system.h>
#include <inet.h> // for hton/ntoh (byteswap) functions
#include "sdram.h" #include "sdram.h"
// FIXME(hack): If we don't have main ram, just target the sram instead. // FIXME(hack): If we don't have main ram, just target the sram instead.
@ -63,22 +61,6 @@ __attribute__((unused)) static void cdelay(int i)
#define DFII_PIX_DATA_BYTES DFII_PIX_DATA_SIZE*CSR_DATA_BYTES #define DFII_PIX_DATA_BYTES DFII_PIX_DATA_SIZE*CSR_DATA_BYTES
#if CSR_DATA_BYTES == 1
typedef uint8_t csr_dw_t;
#define csr_dw_hton(x) (x)
#define csr_dw_ntoh(x) (x)
#elif CSR_DATA_BYTES == 2
typedef uint16_t csr_dw_t;
#define csr_dw_hton(x) htons(x)
#define csr_dw_ntoh(x) ntohs(x)
#elif CSR_DATA_BYTES == 4
typedef uint32_t csr_dw_t;
#define csr_dw_hton(x) htonl(x)
#define csr_dw_ntoh(x) ntohl(x)
#else
#error Unsupported CSR data width
#endif
void sdrsw(void) void sdrsw(void)
{ {
sdram_dfii_control_write(DFII_CONTROL_CKE|DFII_CONTROL_ODT|DFII_CONTROL_RESET_N); sdram_dfii_control_write(DFII_CONTROL_CKE|DFII_CONTROL_ODT|DFII_CONTROL_RESET_N);
@ -120,8 +102,7 @@ void sdrrdbuf(int dq)
{ {
int i, p; int i, p;
int first_byte, step; int first_byte, step;
csr_dw_t buf[DFII_PIX_DATA_SIZE]; unsigned char buf[DFII_PIX_DATA_BYTES];
unsigned char *buf_bytes = (unsigned char *)&(buf[0]);
if(dq < 0) { if(dq < 0) {
first_byte = 0; first_byte = 0;
@ -132,10 +113,10 @@ void sdrrdbuf(int dq)
} }
for(p=0;p<DFII_NPHASES;p++) { for(p=0;p<DFII_NPHASES;p++) {
for(i=0;i<DFII_PIX_DATA_SIZE;i++) csr_rd_buf_uint8(sdram_dfii_pix_rddata_addr[p],
buf[i] = csr_dw_ntoh(MMPTR(sdram_dfii_pix_rddata_addr[p]+DFII_ADDR_SHIFT*i)); buf, DFII_PIX_DATA_BYTES);
for(i=first_byte;i<DFII_PIX_DATA_BYTES;i+=step) for(i=first_byte;i<DFII_PIX_DATA_BYTES;i+=step)
printf("%02x", buf_bytes[i]); printf("%02x", buf[i]);
} }
printf("\n"); printf("\n");
} }
@ -178,9 +159,9 @@ void sdrrderr(char *count)
char *c; char *c;
int _count; int _count;
int i, j, p; int i, j, p;
csr_dw_t prev_data[DFII_NPHASES][DFII_PIX_DATA_SIZE]; unsigned char prev_data[DFII_NPHASES][DFII_PIX_DATA_BYTES];
csr_dw_t err_data[DFII_NPHASES][DFII_PIX_DATA_SIZE]; unsigned char errs[DFII_NPHASES][DFII_PIX_DATA_BYTES];
unsigned char *errs = (unsigned char *)&(err_data[0][0]); unsigned char new_data[DFII_PIX_DATA_BYTES];
if(*count == 0) { if(*count == 0) {
printf("sdrrderr <count>\n"); printf("sdrrderr <count>\n");
@ -193,32 +174,35 @@ void sdrrderr(char *count)
} }
for(p=0;p<DFII_NPHASES;p++) for(p=0;p<DFII_NPHASES;p++)
for(i=0;i<DFII_PIX_DATA_SIZE;i++) for(i=0;i<DFII_PIX_DATA_BYTES;i++)
err_data[p][i] = 0; errs[p][i] = 0;
for(addr=0;addr<16;addr++) { for(addr=0;addr<16;addr++) {
sdram_dfii_pird_address_write(addr*8); sdram_dfii_pird_address_write(addr*8);
sdram_dfii_pird_baddress_write(0); sdram_dfii_pird_baddress_write(0);
command_prd(DFII_COMMAND_CAS|DFII_COMMAND_CS|DFII_COMMAND_RDDATA); command_prd(DFII_COMMAND_CAS|DFII_COMMAND_CS|DFII_COMMAND_RDDATA);
cdelay(15); cdelay(15);
for(p=0;p<DFII_NPHASES;p++) for(p=0;p<DFII_NPHASES;p++)
for(i=0;i<DFII_PIX_DATA_SIZE;i++) csr_rd_buf_uint8(sdram_dfii_pix_rddata_addr[p],
prev_data[p][i] = csr_dw_ntoh(MMPTR(sdram_dfii_pix_rddata_addr[p]+DFII_ADDR_SHIFT*i)); prev_data[p], DFII_PIX_DATA_BYTES);
for(j=0;j<_count;j++) { for(j=0;j<_count;j++) {
command_prd(DFII_COMMAND_CAS|DFII_COMMAND_CS|DFII_COMMAND_RDDATA); command_prd(DFII_COMMAND_CAS|DFII_COMMAND_CS|DFII_COMMAND_RDDATA);
cdelay(15); cdelay(15);
for(p=0;p<DFII_NPHASES;p++) for(p=0;p<DFII_NPHASES;p++) {
for(i=0;i<DFII_PIX_DATA_SIZE;i++) { csr_rd_buf_uint8(sdram_dfii_pix_rddata_addr[p],
csr_dw_t new_data = csr_dw_ntoh(MMPTR(sdram_dfii_pix_rddata_addr[p]+DFII_ADDR_SHIFT*i)); new_data, DFII_PIX_DATA_BYTES);
for(i=0;i<DFII_PIX_DATA_BYTES;i++) {
err_data[p][i] |= prev_data[p][i] ^ new_data; errs[p][i] |= prev_data[p][i] ^ new_data[i];
prev_data[p][i] = new_data; prev_data[p][i] = new_data[i];
} }
}
} }
} }
for(i=0;i<DFII_NPHASES*DFII_PIX_DATA_BYTES;i++) for(p=0;p<DFII_NPHASES;p++)
printf("%02x", errs[i]); for(i=0;i<DFII_PIX_DATA_BYTES;i++)
printf("%02x", errs[p][i]);
printf("\n"); printf("\n");
for(p=0;p<DFII_NPHASES;p++) for(p=0;p<DFII_NPHASES;p++)
for(i=0;i<DFII_PIX_DATA_BYTES;i++) for(i=0;i<DFII_PIX_DATA_BYTES;i++)
@ -231,8 +215,7 @@ void sdrwr(char *startaddr)
int i, p; int i, p;
char *c; char *c;
unsigned int addr; unsigned int addr;
csr_dw_t buf[DFII_PIX_DATA_SIZE]; unsigned char buf[DFII_PIX_DATA_BYTES];
unsigned char *buf_bytes = (unsigned char *)&(buf[0]);
if(*startaddr == 0) { if(*startaddr == 0) {
printf("sdrwr <address>\n"); printf("sdrwr <address>\n");
@ -246,9 +229,9 @@ void sdrwr(char *startaddr)
for(p=0;p<DFII_NPHASES;p++) { for(p=0;p<DFII_NPHASES;p++) {
for(i=0;i<DFII_PIX_DATA_BYTES;i++) for(i=0;i<DFII_PIX_DATA_BYTES;i++)
buf_bytes[i] = 0x10*p + i; buf[i] = 0x10*p + i;
for(i=0;i<DFII_PIX_DATA_SIZE;i++) csr_wr_buf_uint8(sdram_dfii_pix_wrdata_addr[p],
MMPTR(sdram_dfii_pix_wrdata_addr[p]+DFII_ADDR_SHIFT*i) = csr_dw_hton(buf[i]); buf, DFII_PIX_DATA_BYTES);
} }
sdram_dfii_piwr_address_write(addr); sdram_dfii_piwr_address_write(addr);
@ -324,7 +307,7 @@ static void write_delay_inc(int module) {
int write_level(void) int write_level(void)
{ {
int i, j, k, l; int i, j, k;
int err_ddrphy_wdly; int err_ddrphy_wdly;
@ -336,8 +319,7 @@ int write_level(void)
int delays[NBMODULES]; int delays[NBMODULES];
csr_dw_t buf[DFII_PIX_DATA_SIZE]; unsigned char buf[DFII_PIX_DATA_BYTES];
unsigned char *buf_bytes = (unsigned char *)&(buf[0]);
int ok; int ok;
@ -364,9 +346,9 @@ int write_level(void)
for (k=0; k<128; k++) { for (k=0; k<128; k++) {
ddrphy_wlevel_strobe_write(1); ddrphy_wlevel_strobe_write(1);
cdelay(10); cdelay(10);
for (l=0;l<DFII_PIX_DATA_SIZE;l++) csr_rd_buf_uint8(sdram_dfii_pix_rddata_addr[0],
buf[l] = csr_dw_ntoh(MMPTR(sdram_dfii_pix_rddata_addr[0]+DFII_ADDR_SHIFT*l)); buf, DFII_PIX_DATA_BYTES);
if (buf_bytes[NBMODULES-1-i] != 0) if (buf[NBMODULES-1-i] != 0)
one_count++; one_count++;
else else
zero_count++; zero_count++;
@ -478,16 +460,15 @@ static void read_bitslip_inc(char m)
static int read_level_scan(int module, int bitslip) static int read_level_scan(int module, int bitslip)
{ {
unsigned int prv; unsigned int prv;
csr_dw_t prs[DFII_NPHASES][DFII_PIX_DATA_SIZE]; unsigned char prs[DFII_NPHASES][DFII_PIX_DATA_BYTES];
csr_dw_t tst[DFII_PIX_DATA_SIZE]; unsigned char tst[DFII_PIX_DATA_BYTES];
unsigned char *prs_bytes, *tst_bytes; int p, i;
int p, i, j;
int score; int score;
/* Generate pseudo-random sequence */ /* Generate pseudo-random sequence */
prv = 42; prv = 42;
for(p=0;p<DFII_NPHASES;p++) for(p=0;p<DFII_NPHASES;p++)
for(i=0;i<DFII_PIX_DATA_SIZE;i++) { for(i=0;i<DFII_PIX_DATA_BYTES;i++) {
prv = 1664525*prv + 1013904223; prv = 1664525*prv + 1013904223;
prs[p][i] = prv; prs[p][i] = prv;
} }
@ -500,8 +481,8 @@ static int read_level_scan(int module, int bitslip)
/* Write test pattern */ /* Write test pattern */
for(p=0;p<DFII_NPHASES;p++) for(p=0;p<DFII_NPHASES;p++)
for(i=0;i<DFII_PIX_DATA_SIZE;i++) csr_wr_buf_uint8(sdram_dfii_pix_wrdata_addr[p],
MMPTR(sdram_dfii_pix_wrdata_addr[p]+DFII_ADDR_SHIFT*i) = csr_dw_hton(prs[p][i]); prs[p], DFII_PIX_DATA_BYTES);
sdram_dfii_piwr_address_write(0); sdram_dfii_piwr_address_write(0);
sdram_dfii_piwr_baddress_write(0); sdram_dfii_piwr_baddress_write(0);
command_pwr(DFII_COMMAND_CAS|DFII_COMMAND_WE|DFII_COMMAND_CS|DFII_COMMAND_WRDATA); command_pwr(DFII_COMMAND_CAS|DFII_COMMAND_WE|DFII_COMMAND_CS|DFII_COMMAND_WRDATA);
@ -513,11 +494,11 @@ static int read_level_scan(int module, int bitslip)
printf("m%d, b%d: |", module, bitslip); printf("m%d, b%d: |", module, bitslip);
read_delay_rst(module); read_delay_rst(module);
for(j=0; j<ERR_DDRPHY_DELAY;j++) { for(i=0;i<ERR_DDRPHY_DELAY;i++) {
int working = 1; int working = 1;
int show = 1; int show = 1;
#ifdef USDDRPHY #ifdef USDDRPHY
show = (j%16 == 0); show = (i%16 == 0);
#endif #endif
#ifdef ECP5DDRPHY #ifdef ECP5DDRPHY
ddrphy_burstdet_clr_write(1); ddrphy_burstdet_clr_write(1);
@ -526,13 +507,11 @@ static int read_level_scan(int module, int bitslip)
cdelay(15); cdelay(15);
for(p=0;p<DFII_NPHASES;p++) { for(p=0;p<DFII_NPHASES;p++) {
/* read back test pattern */ /* read back test pattern */
for(i=0;i<DFII_PIX_DATA_SIZE;i++) csr_rd_buf_uint8(sdram_dfii_pix_rddata_addr[p],
tst[i] = csr_dw_ntoh(MMPTR(sdram_dfii_pix_rddata_addr[p]+DFII_ADDR_SHIFT*i)); tst, DFII_PIX_DATA_BYTES);
prs_bytes = (unsigned char *)&(prs[p][0]);
tst_bytes = (unsigned char *)&(tst[0]);
/* verify bytes matching current 'module' */ /* verify bytes matching current 'module' */
if (prs_bytes[ NBMODULES-1-module] != tst_bytes[ NBMODULES-1-module] || if (prs[p][ NBMODULES-1-module] != tst[ NBMODULES-1-module] ||
prs_bytes[2*NBMODULES-1-module] != tst_bytes[2*NBMODULES-1-module]) prs[p][2*NBMODULES-1-module] != tst[2*NBMODULES-1-module])
working = 0; working = 0;
} }
#ifdef ECP5DDRPHY #ifdef ECP5DDRPHY
@ -558,10 +537,9 @@ static int read_level_scan(int module, int bitslip)
static void read_level(int module) static void read_level(int module)
{ {
unsigned int prv; unsigned int prv;
csr_dw_t prs[DFII_NPHASES][DFII_PIX_DATA_SIZE]; unsigned char prs[DFII_NPHASES][DFII_PIX_DATA_BYTES];
csr_dw_t tst[DFII_PIX_DATA_SIZE]; unsigned char tst[DFII_PIX_DATA_BYTES];
unsigned char *prs_bytes, *tst_bytes; int p, i;
int p, i, j;
int working; int working;
int delay, delay_min, delay_max; int delay, delay_min, delay_max;
@ -570,7 +548,7 @@ static void read_level(int module)
/* Generate pseudo-random sequence */ /* Generate pseudo-random sequence */
prv = 42; prv = 42;
for(p=0;p<DFII_NPHASES;p++) for(p=0;p<DFII_NPHASES;p++)
for(i=0;i<DFII_PIX_DATA_SIZE;i++) { for(i=0;i<DFII_PIX_DATA_BYTES;i++) {
prv = 1664525*prv + 1013904223; prv = 1664525*prv + 1013904223;
prs[p][i] = prv; prs[p][i] = prv;
} }
@ -583,8 +561,8 @@ static void read_level(int module)
/* Write test pattern */ /* Write test pattern */
for(p=0;p<DFII_NPHASES;p++) for(p=0;p<DFII_NPHASES;p++)
for(i=0;i<DFII_PIX_DATA_SIZE;i++) csr_wr_buf_uint8(sdram_dfii_pix_wrdata_addr[p],
MMPTR(sdram_dfii_pix_wrdata_addr[p]+DFII_ADDR_SHIFT*i) = csr_dw_hton(prs[p][i]); prs[p], DFII_PIX_DATA_BYTES);
sdram_dfii_piwr_address_write(0); sdram_dfii_piwr_address_write(0);
sdram_dfii_piwr_baddress_write(0); sdram_dfii_piwr_baddress_write(0);
command_pwr(DFII_COMMAND_CAS|DFII_COMMAND_WE|DFII_COMMAND_CS|DFII_COMMAND_WRDATA); command_pwr(DFII_COMMAND_CAS|DFII_COMMAND_WE|DFII_COMMAND_CS|DFII_COMMAND_WRDATA);
@ -605,13 +583,11 @@ static void read_level(int module)
working = 1; working = 1;
for(p=0;p<DFII_NPHASES;p++) { for(p=0;p<DFII_NPHASES;p++) {
/* read back test pattern */ /* read back test pattern */
for(i=0;i<DFII_PIX_DATA_SIZE;i++) csr_rd_buf_uint8(sdram_dfii_pix_rddata_addr[p],
tst[i] = csr_dw_ntoh(MMPTR(sdram_dfii_pix_rddata_addr[p]+DFII_ADDR_SHIFT*i)); tst, DFII_PIX_DATA_BYTES);
prs_bytes = (unsigned char *)&(prs[p][0]);
tst_bytes = (unsigned char *)&(tst[0]);
/* verify bytes matching current 'module' */ /* verify bytes matching current 'module' */
if (prs_bytes[ NBMODULES-1-module] != tst_bytes[ NBMODULES-1-module] || if (prs[p][ NBMODULES-1-module] != tst[ NBMODULES-1-module] ||
prs_bytes[2*NBMODULES-1-module] != tst_bytes[2*NBMODULES-1-module]) prs[p][2*NBMODULES-1-module] != tst[2*NBMODULES-1-module])
working = 0; working = 0;
} }
#ifdef ECP5DDRPHY #ifdef ECP5DDRPHY
@ -629,7 +605,7 @@ static void read_level(int module)
/* Get a bit further into the working zone */ /* Get a bit further into the working zone */
#ifdef USDDRPHY #ifdef USDDRPHY
for(j=0;j<16;j++) { for(i=0;i<16;i++) {
delay += 1; delay += 1;
read_delay_inc(module); read_delay_inc(module);
} }
@ -648,13 +624,11 @@ static void read_level(int module)
working = 1; working = 1;
for(p=0;p<DFII_NPHASES;p++) { for(p=0;p<DFII_NPHASES;p++) {
/* read back test pattern */ /* read back test pattern */
for(i=0;i<DFII_PIX_DATA_SIZE;i++) csr_rd_buf_uint8(sdram_dfii_pix_rddata_addr[p],
tst[i] = csr_dw_ntoh(MMPTR(sdram_dfii_pix_rddata_addr[p]+DFII_ADDR_SHIFT*i)); tst, DFII_PIX_DATA_BYTES);
prs_bytes = (unsigned char *)&(prs[p][0]);
tst_bytes = (unsigned char *)&(tst[0]);
/* verify bytes matching current 'module' */ /* verify bytes matching current 'module' */
if (prs_bytes[ NBMODULES-1-module] != tst_bytes[ NBMODULES-1-module] || if (prs[p][ NBMODULES-1-module] != tst[ NBMODULES-1-module] ||
prs_bytes[2*NBMODULES-1-module] != tst_bytes[2*NBMODULES-1-module]) prs[p][2*NBMODULES-1-module] != tst[2*NBMODULES-1-module])
working = 0; working = 0;
} }
#ifdef ECP5DDRPHY #ifdef ECP5DDRPHY
@ -677,7 +651,7 @@ static void read_level(int module)
/* Set delay to the middle */ /* Set delay to the middle */
read_delay_rst(module); read_delay_rst(module);
for(j=0;j<(delay_min+delay_max)/2;j++) for(i=0;i<(delay_min+delay_max)/2;i++)
read_delay_inc(module); read_delay_inc(module);
/* Precharge */ /* Precharge */

225
litex/soc/software/include/hw/common.h
View File

@ -4,8 +4,8 @@
#include <stdint.h> #include <stdint.h>
/* To overwrite CSR accessors, define extern, non-inlined versions /* To overwrite CSR accessors, define extern, non-inlined versions
* of csr_read[bwl]() and csr_write[bwl](), and define * of csr_rd_uint[8|16|32|64]() and csr_wr_uint[8|16|32|64](), and
* CSR_ACCESSORS_DEFINED. * define CSR_ACCESSORS_DEFINED.
*/ */
#ifndef CSR_ACCESSORS_DEFINED #ifndef CSR_ACCESSORS_DEFINED
@ -14,37 +14,232 @@
#ifdef __ASSEMBLER__ #ifdef __ASSEMBLER__
#define MMPTR(x) x #define MMPTR(x) x
#else /* ! __ASSEMBLER__ */ #else /* ! __ASSEMBLER__ */
#define MMPTR(x) (*((volatile unsigned long *)(x)))
static inline void csr_writeb(uint8_t value, unsigned long addr) /* CSRs are stored in subregister slices of CONFIG_CSR_DATA_WIDTH (native
* endianness), with the least significant slice at the lowest aligned
* (base) address. */
#include <generated/soc.h>
#if !defined(CONFIG_CSR_ALIGNMENT) || !defined(CONFIG_CSR_DATA_WIDTH)
#error csr alignment and data-width MUST be set before including this file!
#endif
#if CONFIG_CSR_DATA_WIDTH > CONFIG_CSR_ALIGNMENT
#error invalid CONFIG_CSR_DATA_WIDTH (must not exceed CONFIG_CSR_ALIGNMENT)!
#endif
/* FIXME: preprocessor can't evaluate 'sizeof()' operator, is there a better
* way to implement the following assertion?
* #if sizeof(unsigned long) != CONFIG_CSR_ALIGNMENT/8
* #error invalid CONFIG_CSR_ALIGNMENT (must match native CPU word size)!
* #endif
*/
/* CSR data width (subregister width) in bytes, for direct comparson to sizeof() */
#define CSR_DW_BYTES (CONFIG_CSR_DATA_WIDTH/8)
/* CSR subregisters are embedded inside native CPU word aligned locations: */
#define MMPTR(a) (*((volatile unsigned long *)(a)))
/* Number of subregs required for various total byte sizes, by subreg width:
* NOTE: 1, 2, 4, and 8 bytes represent uint[8|16|32|64]_t C types; However,
* CSRs of intermediate byte sizes (24, 40, 48, and 56) are NOT padded
* (with extra unallocated subregisters) to the next valid C type!
* +-----+-----------------+
* | csr | bytes |
* | _dw | 1 2 3 4 5 6 7 8 |
* | |-----=---=-=-=---|
* | 1 | 1 2 3 4 5 6 7 8 |
* | 2 | 1 1 2 2 3 3 4 4 |
* | 4 | 1 1 1 1 2 2 2 2 |
* | 8 | 1 1 1 1 1 1 1 1 |
* +-----+-----------------+ */
static inline int num_subregs(int csr_bytes)
{ {
*((volatile uint8_t *)addr) = value; return (csr_bytes - 1) / CSR_DW_BYTES + 1;
} }
static inline uint8_t csr_readb(unsigned long addr) /* Read a CSR of size 'csr_bytes' located at address 'a'. */
static inline uint64_t _csr_rd(unsigned long *a, int csr_bytes)
{ {
return *(volatile uint8_t *)addr; uint64_t r = a[0];
for (int i = 1; i < num_subregs(csr_bytes); i++) {
r <<= CONFIG_CSR_DATA_WIDTH;
r |= a[i];
}
return r;
} }
static inline void csr_writew(uint16_t value, unsigned long addr) /* Write value 'v' to a CSR of size 'csr_bytes' located at address 'a'. */
static inline void _csr_wr(unsigned long *a, uint64_t v, int csr_bytes)
{ {
*((volatile uint16_t *)addr) = value; int ns = num_subregs(csr_bytes);
for (int i = 0; i < ns; i++)
a[i] = v >> (CONFIG_CSR_DATA_WIDTH * (ns - 1 - i));
} }
static inline uint16_t csr_readw(unsigned long addr) // FIXME: - should we provide 24, 40, 48, and 56 bit csr_[rd|wr] methods?
static inline uint8_t csr_rd_uint8(unsigned long a)
{ {
return *(volatile uint16_t *)addr; return _csr_rd((unsigned long *)a, sizeof(uint8_t));
} }
static inline void csr_writel(uint32_t value, unsigned long addr) static inline void csr_wr_uint8(uint8_t v, unsigned long a)
{ {
*((volatile uint32_t *)addr) = value; _csr_wr((unsigned long *)a, v, sizeof(uint8_t));
} }
static inline uint32_t csr_readl(unsigned long addr) static inline uint16_t csr_rd_uint16(unsigned long a)
{ {
return *(volatile uint32_t *)addr; return _csr_rd((unsigned long *)a, sizeof(uint16_t));
} }
static inline void csr_wr_uint16(uint16_t v, unsigned long a)
{
_csr_wr((unsigned long *)a, v, sizeof(uint16_t));
}
static inline uint32_t csr_rd_uint32(unsigned long a)
{
return _csr_rd((unsigned long *)a, sizeof(uint32_t));
}
static inline void csr_wr_uint32(uint32_t v, unsigned long a)
{
_csr_wr((unsigned long *)a, v, sizeof(uint32_t));
}
static inline uint64_t csr_rd_uint64(unsigned long a)
{
return _csr_rd((unsigned long *)a, sizeof(uint64_t));
}
static inline void csr_wr_uint64(uint64_t v, unsigned long a)
{
_csr_wr((unsigned long *)a, v, sizeof(uint64_t));
}
/* Read a CSR located at address 'a' into an array 'buf' of 'cnt' elements.
*
* NOTE: Since CSR_DW_BYTES is a constant here, we might be tempted to further
* optimize things by leaving out one or the other of the if() branches below,
* depending on each unsigned type width;
* However, this code is also meant to serve as a reference for how CSRs are
* to be manipulated by other programs (e.g., an OS kernel), which may benefit
* from dynamically handling multiple possible CSR subregister data widths
* (e.g., by passing a value in through the Device Tree).
* Ultimately, if CSR_DW_BYTES is indeed a constant, the compiler should be
* able to determine on its own whether it can automatically optimize away one
* of the if() branches! */
#define _csr_rd_buf(a, buf, cnt) \
{ \
int i, j, nsubs, n_sub_elem; \
unsigned long *addr = (unsigned long *)(a); \
uint64_t r; \
if (sizeof(buf[0]) >= CSR_DW_BYTES) { \
/* one or more subregisters per element */ \
for (i = 0; i < cnt; i++) { \
buf[i] = _csr_rd(addr, sizeof(buf[0])); \
addr += num_subregs(sizeof(buf[0])); \
} \
} else { \
/* multiple elements per subregister (2, 4, or 8) */ \
nsubs = num_subregs(sizeof(buf[0]) * cnt); \
n_sub_elem = CSR_DW_BYTES / sizeof(buf[0]); \
for (i = 0; i < nsubs; i++) { \
r = addr[i]; \
for (j = n_sub_elem - 1; j >= 0; j--) { \
if (i * n_sub_elem + j < cnt) \
buf[i * n_sub_elem + j] = r; \
r >>= sizeof(buf[0]) * 8; \
} \
} \
} \
}
/* Write an array 'buf' of 'cnt' elements to a CSR located at address 'a'.
*
* NOTE: The same optimization considerations apply here as with _csr_rd_buf()
* above.
*/
#define _csr_wr_buf(a, buf, cnt) \
{ \
int i, j, nsubs, n_sub_elem; \
unsigned long *addr = (unsigned long *)(a); \
uint64_t v; \
if (sizeof(buf[0]) >= CSR_DW_BYTES) { \
/* one or more subregisters per element */ \
for (i = 0; i < cnt; i++) { \
_csr_wr(addr, buf[i], sizeof(buf[0])); \
addr += num_subregs(sizeof(buf[0])); \
} \
} else { \
/* multiple elements per subregister (2, 4, or 8) */ \
nsubs = num_subregs(sizeof(buf[0]) * cnt); \
n_sub_elem = CSR_DW_BYTES / sizeof(buf[0]); \
for (i = 0; i < nsubs; i++) { \
v = buf[i * n_sub_elem + 0]; \
for (j = 1; j < n_sub_elem; j++) { \
if (i * n_sub_elem + j == cnt) \
break; \
v <<= sizeof(buf[0]) * 8; \
v |= buf[i * n_sub_elem + j]; \
} \
addr[i] = v; \
} \
} \
}
static inline void csr_rd_buf_uint8(unsigned long a, uint8_t *buf, int cnt)
{
_csr_rd_buf(a, buf, cnt);
}
static inline void csr_wr_buf_uint8(unsigned long a,
const uint8_t *buf, int cnt)
{
_csr_wr_buf(a, buf, cnt);
}
static inline void csr_rd_buf_uint16(unsigned long a, uint16_t *buf, int cnt)
{
_csr_rd_buf(a, buf, cnt);
}
static inline void csr_wr_buf_uint16(unsigned long a,
const uint16_t *buf, int cnt)
{
_csr_wr_buf(a, buf, cnt);
}
static inline void csr_rd_buf_uint32(unsigned long a, uint32_t *buf, int cnt)
{
_csr_rd_buf(a, buf, cnt);
}
static inline void csr_wr_buf_uint32(unsigned long a,
const uint32_t *buf, int cnt)
{
_csr_wr_buf(a, buf, cnt);
}
/* NOTE: the macros' "else" branch is unreachable, no need to be warned
* about a >= 64bit left shift! */
#pragma GCC diagnostic push
#pragma GCC diagnostic ignored "-Wshift-count-overflow"
static inline void csr_rd_buf_uint64(unsigned long a, uint64_t *buf, int cnt)
{
_csr_rd_buf(a, buf, cnt);
}
static inline void csr_wr_buf_uint64(unsigned long a,
const uint64_t *buf, int cnt)
{
_csr_wr_buf(a, buf, cnt);
}
#pragma GCC diagnostic pop
#endif /* ! __ASSEMBLER__ */ #endif /* ! __ASSEMBLER__ */
#endif /* ! CSR_ACCESSORS_DEFINED */ #endif /* ! CSR_ACCESSORS_DEFINED */