CHANGES.md: Update.

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Florent Kermarrec 2023-09-07 14:27:12 +02:00
parent e1025c610a
commit fbae6e8e37
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@ -64,6 +64,7 @@
- soc/interconnect : Improved DMA Bus to use the same Bus Standard than the CPU DMA Bus. - soc/interconnect : Improved DMA Bus to use the same Bus Standard than the CPU DMA Bus.
- liteeth/phy : Added Artix7 2500BASE-X PHY. - liteeth/phy : Added Artix7 2500BASE-X PHY.
- liteeth/phy : Added Gowin Arora V RGMII PHY (GW5RGMII). - liteeth/phy : Added Gowin Arora V RGMII PHY (GW5RGMII).
- liteeth/phy : Added Titanium RGMII PHY (Tested with Ti60 F225 + RGMII adapter board).
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