litex/litex
enjoy-digital 018094abb2
Merge pull request #809 from stffrdhrn/mor1kx-smp
cpu/mor1kx: Add initial SMP support to cpu core
2021-02-09 09:54:49 +01:00
..
build build/xilinx/symbiflow: fix bitstream_device select 2021-02-08 15:38:30 +01:00
gen gen/fhdl/verilog: improve clock domain error reporting. 2020-11-10 13:27:29 +01:00
soc Merge pull request #809 from stffrdhrn/mor1kx-smp 2021-02-09 09:54:49 +01:00
tools litex_term: support Intel/Altera nios2-terminal 2021-02-08 11:42:37 +07:00
__init__.py revert get_data_mod change (Vexrisv SMP repo has been renamed to pythondata-cpu-vexriscv_smp). 2020-11-05 19:55:18 +01:00