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litex
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misoclib
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mem
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Florent Kermarrec
a8d91c0c1d
sdram/module: fix MT8JTF12864, rowbits is 14 and not 16.... (16 was used from the beginning, but it does not fix the runtime issue)
2015-03-28 16:35:15 +01:00
..
flash
litesata
litexxx cores: use default baudrate of 115200 for all tests
2015-03-20 12:22:53 +01:00
sdram
__init__.py