litex/litex/soc
2020-06-10 11:46:59 +02:00
..
cores litex/build/sim: add module for simulating SPD EEPROM 2020-05-28 12:10:25 +02:00
doc soc/doc/csr: allow CSRField.reset to be a Migen Constant. 2020-03-23 18:47:41 +01:00
integration soc/spisdcard: use 32-bit SPIMaster and do 32-bit xfers in spisdcardreceive_block to optimize speed. 2020-06-10 09:50:30 +02:00
interconnect interconnect/wishbone/DownConverter: skip accesses on slave when sel==0 and simplify. 2020-06-01 11:06:23 +02:00
software software/liblitesdcard/ffconf: enable FF_FS_MINIMIZE and FF_FS_TINY. 2020-06-10 11:46:59 +02:00
__init__.py litex: reorganize things, first work working version 2015-11-07 17:48:55 +01:00