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litex/misoclib/mem/litesata/phy
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Florent Kermarrec 04c64eb1d8 litesata/example_designs: fix core generation (RAID introduced some changes on the PHY) 2015-06-26 00:20:58 +02:00
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k7
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__init__.py litesata/example_designs: fix core generation (RAID introduced some changes on the PHY) 2015-06-26 00:20:58 +02:00
ctrl.py
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datapath.py
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