40 lines
607 B
C
40 lines
607 B
C
#include <irq.h>
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#include <uart.h>
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#include <system.h>
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#include <generated/mem.h>
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#include <generated/csr.h>
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void flush_cpu_icache(void)
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{
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asm volatile(
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"wcsr ICC, r0\n"
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"nop\n"
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"nop\n"
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"nop\n"
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"nop\n"
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);
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}
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void flush_cpu_dcache(void)
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{
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asm volatile(
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"wcsr DCC, r0\n"
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"nop\n"
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);
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}
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void flush_l2_cache(void)
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{
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unsigned int l2_nwords;
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unsigned int i;
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register unsigned int addr;
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register unsigned int dummy;
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l2_nwords = 1 << (identifier_l2_size_read() - 2);
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for(i=0;i<2*l2_nwords;i++) {
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addr = SDRAM_BASE + i*4;
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__asm__ volatile("lw %0, (%1+0)\n":"=r"(dummy):"r"(addr));
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}
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}
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