Florent Kermarrec 12a7528667 interconnect/stream/SyncFIFO: allow depth down to 0.		2020-02-28 21:54:02 +01:00
..
cores	cores/gpio: use separate TSTriple for each bit.	2020-02-28 09:10:28 +01:00
doc	doc: fix regression with new irq manager	2020-02-13 08:32:44 +08:00
integration	integration/soc: -x on soc.py	2020-02-26 14:43:01 +01:00
interconnect	interconnect/stream/SyncFIFO: allow depth down to 0.	2020-02-28 21:54:02 +01:00
software	software/bios/sdram: allow setting CLK/CMD delay from user design and configure it before write/read leveling.	2020-02-27 12:26:27 +01:00
__init__.py	litex: reorganize things, first work working version	2015-11-07 17:48:55 +01:00