litex/litex
Florent Kermarrec 168b07b9a2 soc_core: add csr range check 2018-10-06 20:55:16 +02:00
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boards Merge pull request #112 from cr1901/8k-b-evn 2018-10-04 21:12:33 +02:00
build Fix compiler warnings from GCC 8.1 2018-10-04 23:07:48 +09:00
gen build: use our own fhdl/verilog code (needed to avoid combinatorial loop in simulation) 2018-05-01 12:02:54 +02:00
soc soc_core: add csr range check 2018-10-06 20:55:16 +02:00
__init__.py ease RemoteClient import 2018-09-23 10:23:00 +02:00