litex/litex/build
2021-02-15 09:29:47 -08:00
..
altera Quartus: handle vh and svh files 2020-12-20 11:53:08 +01:00
gowin build/gowin: Don't generate IO_LOC is pin name is X. 2021-02-01 13:08:37 +01:00
lattice Merge pull request #736 from Disasm/ecpdap 2020-12-18 15:39:24 +01:00
microsemi build: add SPDX License identifier and specify file is part of LiteX. 2020-08-23 15:14:45 +02:00
sim Fix gtkwave.py to be compatible with python 3.6 2021-02-02 11:14:16 +01:00
xilinx Merge remote-tracking branch 'upstream/master' 2021-02-15 09:29:47 -08:00
__init__.py litex: reorganize things, first work working version 2015-11-07 17:48:55 +01:00
dfu.py Unconditionally ask dfu-util to "Issue USB Reset signalling once we're finished". 2020-10-05 17:16:10 +02:00
generic_platform.py build/generic_platform: avoid removing X pins from named_sc. 2021-02-01 13:12:25 +01:00
generic_programmer.py build/generic_programmer: add call method that raises OSError when failing and use it on specific programmers. 2020-11-10 10:22:57 +01:00
io.py build: add SPDX License identifier and specify file is part of LiteX. 2020-08-23 15:14:45 +02:00
openfpgaloader.py Add flash method to openFPGALoader class for support with generic_programmer usage (needed for linux-on-litex-vexriscv) + add offset/address support for firmware load 2021-01-30 13:20:30 +01:00
openocd.py jtagbone/openocd: add binary mode on JTAGUART to fix "\n" to "\r" remapping that is not wanted in binary mode. 2021-02-04 11:44:43 +01:00
tools.py build/tools/language_by_filename: add svo to system-verilog extensions. 2021-01-18 16:29:52 +01:00