42 lines
2.0 KiB
Python
42 lines
2.0 KiB
Python
from migen.fhdl.std import *
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from migen.fhdl.specials import _MemoryPort
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from migen.fhdl.decorators import ModuleTransformer
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from migen.util.misc import gcd_multiple
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class FullMemoryWE(ModuleTransformer):
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def transform_fragment(self, i, f):
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newspecials = set()
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for orig in f.specials:
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if not isinstance(orig, Memory):
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newspecials.add(orig)
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continue
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global_granularity = gcd_multiple([p.we_granularity if p.we_granularity else orig.width for p in orig.ports])
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if global_granularity == orig.width:
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newspecials.add(orig) # nothing to do
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else:
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for i in range(orig.width//global_granularity):
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if orig.init is None:
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newinit = None
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else:
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newinit = [(v >> i*global_granularity) & (2**global_granularity - 1) for v in orig.init]
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newmem = Memory(global_granularity, orig.depth, newinit, orig.name_override + "_grain" + str(i))
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newspecials.add(newmem)
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for port in orig.ports:
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port_granularity = port.we_granularity if port.we_granularity else orig.width
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newport = _MemoryPort(adr=port.adr,
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dat_r=port.dat_r[i*global_granularity:(i+1)*global_granularity] if port.dat_r is not None else None,
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we=port.we[i*global_granularity//port_granularity] if port.we is not None else None,
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dat_w=port.dat_w[i*global_granularity:(i+1)*global_granularity] if port.dat_w is not None else None,
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async_read=port.async_read,
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re=port.re,
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we_granularity=0,
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mode=port.mode,
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clock_domain=port.clock)
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newmem.ports.append(newport)
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newspecials.add(newport)
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f.specials = newspecials
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