152 lines
5.2 KiB
Python
152 lines
5.2 KiB
Python
# This file is Copyright (c) 2013 Florent Kermarrec <florent@enjoy-digital.fr>
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# License: BSD
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import os
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import subprocess
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from migen.fhdl.structure import _Fragment
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from migen.build.generic_platform import Pins, IOStandard, Misc
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from migen.build import tools
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def _format_constraint(c, signame, fmt_r):
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if isinstance(c, Pins):
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return "set_location_assignment -comment \"{name}\" " \
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"-to {signame} Pin_{pin}".format(
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signame=signame,
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name=fmt_r,
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pin=c.identifiers[0])
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elif isinstance(c, IOStandard):
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return "set_instance_assignment -name io_standard " \
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"-comment \"{name}\" \"{std}\" -to {signame}".format(
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signame=signame,
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name=fmt_r,
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std=c.name)
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elif isinstance(c, Misc):
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if not isinstance(c.misc, str) and len(c.misc) == 2:
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return "set_instance_assignment -comment \"{name}\" " \
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"-name {misc[0]} \"{misc[1]}\" -to {signame}".format(
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signame=signame,
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name=fmt_r,
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misc=c.misc)
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else:
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return "set_instance_assignment -comment \"{name}\" " \
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"-name {misc} " \
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"-to {signame}".format(
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signame=signame,
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name=fmt_r,
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misc=c.misc)
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def _format_qsf(signame, pin, others, resname):
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fmt_r = "{}:{}".format(*resname[:2])
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if resname[2] is not None:
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fmt_r += "." + resname[2]
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fmt_c = [_format_constraint(c, signame, fmt_r) for c in
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([Pins(pin)] + others)]
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return '\n'.join(fmt_c)
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def _build_qsf(named_sc, named_pc):
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lines = []
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for sig, pins, others, resname in named_sc:
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if len(pins) > 1:
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for i, p in enumerate(pins):
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lines.append(
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_format_qsf("{}[{}]".format(sig, i), p, others, resname))
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else:
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lines.append(_format_qsf(sig, pins[0], others, resname))
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if named_pc:
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lines.append("")
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lines.append("\n\n".join(named_pc))
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lines.append("set_global_assignment -name top_level_entity top")
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return "\n".join(lines)
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def _build_files(device, sources, vincpaths, named_sc, named_pc, build_name):
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lines = []
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for filename, language, library in sources:
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# Enforce use of SystemVerilog
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# (Quartus does not support global parameters in Verilog)
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if language == "verilog":
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language = "systemverilog"
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lines.append(
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"set_global_assignment -name {lang}_FILE {path} "
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"-library {lib}".format(
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lang=language.upper(),
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path=filename.replace("\\", "/"),
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lib=library))
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for path in vincpaths:
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lines.append("set_global_assignment -name SEARCH_PATH {}".format(
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path.replace("\\", "/")))
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lines.append(_build_qsf(named_sc, named_pc))
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lines.append("set_global_assignment -name DEVICE {}".format(device))
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tools.write_to_file("{}.qsf".format(build_name), "\n".join(lines))
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def _run_quartus(build_name, quartus_path):
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build_script_contents = """# Autogenerated by Migen
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set -e
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quartus_map --read_settings_files=on --write_settings_files=off {build_name} -c {build_name}
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quartus_fit --read_settings_files=off --write_settings_files=off {build_name} -c {build_name}
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quartus_asm --read_settings_files=off --write_settings_files=off {build_name} -c {build_name}
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quartus_sta {build_name} -c {build_name}
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""".format(build_name=build_name) # noqa
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build_script_file = "build_" + build_name + ".sh"
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tools.write_to_file(build_script_file,
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build_script_contents,
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force_unix=True)
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if subprocess.call(["bash", build_script_file]):
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raise OSError("Subprocess failed")
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class AlteraQuartusToolchain:
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def build(self, platform, fragment, build_dir="build", build_name="top",
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toolchain_path="/opt/Altera", run=True):
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tools.mkdir_noerror(build_dir)
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os.chdir(build_dir)
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if not isinstance(fragment, _Fragment):
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fragment = fragment.get_fragment()
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platform.finalize(fragment)
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v_output = platform.get_verilog(fragment)
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named_sc, named_pc = platform.resolve_signals(v_output.ns)
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v_file = build_name + ".v"
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v_output.write(v_file)
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sources = platform.sources | {(v_file, "verilog", "work")}
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_build_files(platform.device,
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sources,
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platform.verilog_include_paths,
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named_sc,
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named_pc,
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build_name)
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if run:
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_run_quartus(build_name, toolchain_path)
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os.chdir("..")
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return v_output.ns
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def add_period_constraint(self, platform, clk, period):
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# TODO: handle differential clk
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platform.add_platform_command(
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"set_global_assignment -name duty_cycle 50 -section_id {clk}",
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clk=clk)
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platform.add_platform_command(
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"set_global_assignment -name fmax_requirement \"{freq} MHz\" "
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"-section_id {clk}".format(freq=(1. / period) * 1000,
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clk="{clk}"),
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clk=clk)
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