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1d2e7e8390
litex
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mibuild
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Florent Kermarrec
1d2e7e8390
mibuild/platforms/minispartan6: adapt to recent changes (able to build simple example)
2015-03-21 18:31:50 +01:00
..
altera
mibuild/altera: use new Toolchain/Platform architecture
2015-03-16 21:07:55 +01:00
lattice
mibuild/lattice/diamond: add verilog include path (thanks Lattice's FAE since it's not documented)
2015-03-18 18:54:22 +01:00
platforms
mibuild/platforms/minispartan6: adapt to recent changes (able to build simple example)
2015-03-21 18:31:50 +01:00
sim
mibuild/sim: clean up (thanks sb)
2015-03-10 16:41:52 +01:00
xilinx
mibuild/xilinx/common: add XilinxDDROutput
2015-03-16 22:53:05 +01:00
__init__.py
merge Mibuild into Migen
2013-11-23 10:45:15 +01:00
generic_platform.py
fhdl/verilog: revert "fhdl/verilog: add simulation parameter to avoid simulation tricks in synthetizable code"
2015-03-18 14:59:22 +01:00
generic_programmer.py
mibuild: better file organization (create directory for each vendor and move programmers in it)
2015-02-26 12:25:59 +01:00
tools.py
remove trailing whitespaces
2014-10-17 17:08:46 +08:00