151 lines
3.2 KiB
C
151 lines
3.2 KiB
C
/*
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* Milkymist SoC (Software)
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* Copyright (C) 2012 Sebastien Bourdeauducq
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, version 3 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <stdio.h>
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#include <stdlib.h>
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#include <hw/dfii.h>
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#include "ddrinit.h"
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static void cdelay(int i)
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{
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while(i > 0) {
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__asm__ volatile("nop");
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i--;
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}
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}
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static void setaddr(int a)
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{
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CSR_DFII_AH_P0 = (a & 0x1fe0) >> 5;
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CSR_DFII_AL_P0 = a & 0x001f;
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CSR_DFII_AH_P1 = (a & 0x1fe0) >> 5;
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CSR_DFII_AL_P1 = a & 0x001f;
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}
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static void init_sequence(void)
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{
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int i;
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printf("Sending initialization sequence...\n");
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/* Bring CKE high */
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setaddr(0x0000);
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CSR_DFII_BA_P0 = 0;
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CSR_DFII_CONTROL = DFII_CONTROL_CKE;
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/* Precharge All */
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setaddr(0x0400);
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CSR_DFII_COMMAND_P0 = DFII_COMMAND_RAS|DFII_COMMAND_WE|DFII_COMMAND_CS;
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/* Load Extended Mode Register */
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CSR_DFII_BA_P0 = 1;
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setaddr(0x0000);
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CSR_DFII_COMMAND_P0 = DFII_COMMAND_RAS|DFII_COMMAND_CAS|DFII_COMMAND_WE|DFII_COMMAND_CS;
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CSR_DFII_BA_P0 = 0;
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/* Load Mode Register */
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setaddr(0x0132); /* Reset DLL, CL=3, BL=4 */
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CSR_DFII_COMMAND_P0 = DFII_COMMAND_RAS|DFII_COMMAND_CAS|DFII_COMMAND_WE|DFII_COMMAND_CS;
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cdelay(200);
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/* Precharge All */
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setaddr(0x0400);
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CSR_DFII_COMMAND_P0 = DFII_COMMAND_RAS|DFII_COMMAND_WE|DFII_COMMAND_CS;
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/* 2x Auto Refresh */
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for(i=0;i<2;i++) {
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setaddr(0);
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CSR_DFII_COMMAND_P0 = DFII_COMMAND_RAS|DFII_COMMAND_CAS|DFII_COMMAND_CS;
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cdelay(4);
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}
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/* Load Mode Register */
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setaddr(0x0032); /* CL=3, BL=4 */
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CSR_DFII_COMMAND_P0 = DFII_COMMAND_RAS|DFII_COMMAND_CAS|DFII_COMMAND_WE|DFII_COMMAND_CS;
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cdelay(200);
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}
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void ddrrd(char *startaddr)
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{
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char *c;
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unsigned int addr;
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int i;
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if(*startaddr == 0) {
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printf("ddrrd <address>\n");
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return;
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}
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addr = strtoul(startaddr, &c, 0);
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if(*c != 0) {
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printf("incorrect address\n");
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return;
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}
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setaddr(addr);
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CSR_DFII_BA_P0 = 0;
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CSR_DFII_COMMAND_P0 = DFII_COMMAND_CAS|DFII_COMMAND_CS|DFII_COMMAND_RDDATA;
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cdelay(15);
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for(i=0;i<8;i++)
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printf("%02x", MMPTR(0xe0000834+4*i));
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for(i=0;i<8;i++)
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printf("%02x", MMPTR(0xe0000884+4*i));
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printf("\n");
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}
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void ddrwr(char *startaddr)
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{
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char *c;
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unsigned int addr;
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int i;
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if(*startaddr == 0) {
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printf("ddrrd <address>\n");
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return;
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}
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addr = strtoul(startaddr, &c, 0);
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if(*c != 0) {
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printf("incorrect address\n");
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return;
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}
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for(i=0;i<8;i++) {
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MMPTR(0xe0000814+4*i) = i;
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MMPTR(0xe0000864+4*i) = 0xf0 + i;
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}
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setaddr(addr);
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CSR_DFII_BA_P1 = 0;
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CSR_DFII_COMMAND_P1 = DFII_COMMAND_CAS|DFII_COMMAND_WE|DFII_COMMAND_CS|DFII_COMMAND_WRDATA;
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}
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int ddrinit(void)
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{
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printf("Initializing DDR SDRAM...\n");
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init_sequence();
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setaddr(0x0000);
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CSR_DFII_BA_P0 = 0;
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CSR_DFII_COMMAND_P0 = DFII_COMMAND_RAS|DFII_COMMAND_CS;
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cdelay(15);
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return 1;
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}
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