litex/litex
2018-08-22 13:28:23 +02:00
..
boards boards/plarforms/genesys2: replace user_dip_sw with user_sw 2018-07-18 12:48:44 +02:00
build sim/verilator: catch ctrl-c on exit and revert default termios settings 2018-08-16 15:13:27 +02:00
gen
soc soc_sdram: vivado is now able to implement the l2_cache correctly (tested with vivado 2017.2 and >) 2018-08-22 13:28:23 +02:00
__init__.py