55 lines
1.8 KiB
Python
55 lines
1.8 KiB
Python
from migen.fhdl.std import *
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from migen.bus import wishbone
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from migen.bus.transactions import *
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from migen.sim.generic import run_simulation
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from liteeth.common import *
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from liteeth.mac import LiteEthMAC
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from liteeth.test.common import *
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from liteeth.test.model import phy, mac
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class TB(Module):
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def __init__(self):
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self.submodules.hostphy = phy.PHY(8, debug=True)
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self.submodules.hostmac = mac.MAC(self.hostphy, debug=True, random_level=0)
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self.submodules.ethmac = LiteEthMAC(phy=self.hostphy, dw=32, interface="core", with_hw_preamble_crc=True)
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self.submodules.streamer = PacketStreamer(eth_mac_description(32), last_be=1)
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self.submodules.streamer_randomizer = AckRandomizer(eth_mac_description(32), level=0)
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self.submodules.logger_randomizer = AckRandomizer(eth_mac_description(32), level=0)
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self.submodules.logger = PacketLogger(eth_mac_description(32))
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# use sys_clk for each clock_domain
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self.clock_domains.cd_eth_rx = ClockDomain()
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self.clock_domains.cd_eth_tx = ClockDomain()
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self.comb += [
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self.cd_eth_rx.clk.eq(ClockSignal()),
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self.cd_eth_rx.rst.eq(ResetSignal()),
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self.cd_eth_tx.clk.eq(ClockSignal()),
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self.cd_eth_tx.rst.eq(ResetSignal()),
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]
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self.comb += [
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Record.connect(self.streamer.source, self.streamer_randomizer.sink),
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Record.connect(self.streamer_randomizer.source, self.ethmac.sink),
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Record.connect(self.ethmac.source, self.logger_randomizer.sink),
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Record.connect(self.logger_randomizer.source, self.logger.sink)
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]
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def gen_simulation(self, selfp):
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selfp.cd_eth_rx.rst = 1
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selfp.cd_eth_tx.rst = 1
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yield
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selfp.cd_eth_rx.rst = 0
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selfp.cd_eth_tx.rst = 0
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for i in range(8):
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streamer_packet = Packet([i for i in range(64)])
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print(streamer_packet)
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yield from self.streamer.send(streamer_packet)
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if __name__ == "__main__":
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run_simulation(TB(), ncycles=1000, vcd_name="my.vcd", keep_files=True)
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