65 lines
1.5 KiB
Python
65 lines
1.5 KiB
Python
import string
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import time
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import serial
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from struct import *
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from migen.fhdl.structure import *
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def write_b(uart, data):
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uart.write(pack('B',data))
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class Uart2Spi:
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def __init__(self, port, baudrate, debug = False):
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self.port = port
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self.baudrate = baudrate
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self.debug = debug
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self.uart = serial.Serial(port, baudrate, timeout=0.25)
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def read(self, addr):
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write_b(self.uart, 0x02)
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write_b(self.uart, (addr>>8)&0xFF)
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write_b(self.uart, (addr&0xFF))
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write_b(self.uart, 0x00)
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read = self.uart.read()
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if self.debug:
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print("RD @ %04X" %addr)
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return int(read[0])
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def read_n(self, addr, n, endianess = "LE"):
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r = 0
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words = int(2**bits_for(n-1)/8)
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for i in range(words):
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if endianess == "BE":
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r += self.read(addr+i)<<(8*i)
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elif endianess == "LE":
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r += self.read(addr+words-1-i)<<(8*i)
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if self.debug:
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print("RD @ %04X" %addr)
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return r
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def write(self, addr, data):
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write_b(self.uart, 0x01)
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write_b(self.uart, (addr>>8)&0xFF)
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write_b(self.uart, (addr&0xFF))
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write_b(self.uart, data)
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if self.debug:
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print("WR %02X @ %04X" %(data, addr))
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def write_n(self, addr, data, n, endianess = "LE"):
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words = int(2**bits_for(n-1)/8)
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for i in range(words):
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if endianess == "BE":
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self.write(addr+i, (data>>(8*i)) & 0xFF)
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elif endianess == "LE":
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self.write(addr+words-1-i, (data>>(8*i)) & 0xFF)
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if self.debug:
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print("WR %08X @ %04X" %(data, addr))
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def main():
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csr = Uart2Spi(1,115200)
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for i in range(100):
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csr.write(0x0000,i)
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print(csr.read(0x0000))
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if __name__ == '__main__':
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main() |