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2886fe1701
* Add bios test mode for CI This enables to test the booting of each CPU configurations with the bios in Verilator simulation.
60 lines
1.7 KiB
Python
60 lines
1.7 KiB
Python
#
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# This file is part of LiteX.
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#
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# Copyright (c) 2021 Navaneeth Bhardwaj <navan93@gmail.com>
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# SPDX-License-Identifier: BSD-2-Clause
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import unittest
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import pexpect
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import sys
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class TestCPU(unittest.TestCase):
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def boot_test(self, cpu_type):
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cmd = f'lxsim --cpu-type={cpu_type}'
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litex_prompt = [b'\033\[[0-9;]+mlitex\033\[[0-9;]+m>']
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is_success = True
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with open("/tmp/test_boot_log", "wb") as result_file:
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p = pexpect.spawn(cmd, timeout=None, logfile=result_file)
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try:
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match_id = p.expect(litex_prompt, timeout=1200)
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except pexpect.EOF:
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print('\n*** Premature termination')
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is_success = False
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except pexpect.TIMEOUT:
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print('\n*** Timeout ')
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is_success = False
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if not is_success:
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print(f'*** {cpu_type} Boot Failure')
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with open("/tmp/test_boot_log", "r") as result_file:
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print(result_file.read())
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else:
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p.terminate(force=True)
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print(f'*** {cpu_type} Boot Success')
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return is_success
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def test_vexriscv(self):
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self.assertTrue(self.boot_test("vexriscv"))
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def test_vexriscv_smp(self):
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self.assertTrue(self.boot_test("vexriscv_smp"))
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def test_cv32e40p(self):
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self.assertTrue(self.boot_test("cv32e40p"))
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def test_ibex(self):
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self.assertTrue(self.boot_test("ibex"))
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def test_serv(self):
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self.assertTrue(self.boot_test("serv"))
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def test_femtorv(self):
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self.assertTrue(self.boot_test("femtorv"))
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def test_picorv32(self):
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self.assertTrue(self.boot_test("picorv32"))
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def test_minerva(self):
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self.assertTrue(self.boot_test("minerva"))
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