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3f7f0a3151
litex
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misoclib
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soc
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whitequark
4b6bd43d8e
Enable ror, ffl1 and addc for OR1K.
2015-07-30 10:55:01 +03:00
..
__init__.py
Don't build base libraries and BIOS with -fPIC after all.
2015-07-29 12:09:05 +03:00
cpuif.py
Enable ror, ffl1 and addc for OR1K.
2015-07-30 10:55:01 +03:00
sdram.py
soc/sdram: add L2_SIZE constant and avoid declaring an empty flush_l2_cache function when L2_SIZE is not defined
2015-06-19 08:39:37 +02:00