litex/litex/soc
enjoy-digital 4ccf62afc1
Merge pull request #423 from gsomlo/gls-ethmac-fixes
integration/soc: add_ethernet: honor self.map["ethmac"], if present
2020-03-11 12:33:50 +01:00
..
cores cores/gpio: add CSR descriptions. 2020-03-11 12:06:15 +01:00
doc Add SVD export capability to Builder (csr_svd parameter) and targets (--csr-svd argument) and fix svd regression. 2020-03-06 14:12:58 +01:00
integration integration/soc: add_ethernet: honor self.map["ethmac"], if present 2020-03-10 19:49:34 -04:00
interconnect Fix copyrights 2020-03-05 17:44:10 +01:00
software bios: add more Ultrascale SDRAM debug with sdram_cdly command to set clk/cmd delay. 2020-03-10 13:08:49 +01:00
__init__.py litex: reorganize things, first work working version 2015-11-07 17:48:55 +01:00