Sebastien Bourdeauducq 8baa957539 genlib/fifo: use synchronous memory read instead of additional register ... The latter causes problems with InsertReset		2014-08-02 08:52:49 +08:00
..
actorlib	fix SimActor TB terminations	2014-01-28 00:03:56 +01:00
bank	migen/bank/description: add reset parameter to CSRStatus	2014-06-15 23:54:38 +02:00
bus	wishbone2lasmi: fix wordbits computation	2014-05-01 13:32:18 +02:00
fhdl	migen.fhdl.structure: add Signal.like(other)	2014-07-24 23:52:59 -06:00
flow	flow.plumbing: spelling	2014-07-19 14:29:51 -06:00
genlib	genlib/fifo: use synchronous memory read instead of additional register	2014-08-02 08:52:49 +08:00
pytholite	replace use of __dict__ with dir()/xdir()	2013-11-02 16:03:47 +01:00
sim	migen/sim/generic: use kwargs to pass parameters to icarus.Runner	2014-07-24 10:17:54 -06:00
test	test/SyncFIFOCase: better test bench termination	2014-04-07 00:05:08 +02:00
util	utils/misc: add gcd_multiple function to compute GCD or any number of integers	2013-12-12 17:36:50 +01:00
__init__.py	Initial import, FHDL basic structure, divider example	2011-12-04 16:44:38 +01:00