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4fd974be10
litex
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litex
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Florent Kermarrec
4fd974be10
build/gowin: Minor cleanups.
2021-07-15 09:36:41 +02:00
..
build
build/gowin: Minor cleanups.
2021-07-15 09:36:41 +02:00
compat
Replace deprecated inspect.getargspec with inspect.getfullargspec.
2021-06-15 08:03:11 -05:00
gen
gen/fhdl/verilog: improve clock domain error reporting.
2020-11-10 13:27:29 +01:00
soc
clock/gowin_gw1n: Add Initial On-Chip Oscillator support.
2021-07-14 11:42:35 +02:00
tools
tools/litex_sim: Let the SDRAMPHYModel pick default settings.
2021-07-08 09:09:57 +02:00
__init__.py
revert get_data_mod change (Vexrisv SMP repo has been renamed to pythondata-cpu-vexriscv_smp).
2020-11-05 19:55:18 +01:00