Florent Kermarrec 9137b91e9e sdram: remove nbits from modules and databits from GeomSettings		2015-03-26 23:27:37 +01:00
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core	software/memtest: remove Mixxeo/M1 hardcoded values in bandwidth computation	2015-03-26 00:01:42 +01:00
frontend	sdram: reintroduce dat_ack change (it was a small issue on wishbone writes (sending data 1 clock cycle too late) that was not detected by memtest)	2015-03-02 10:59:43 +01:00
phy	sdram: remove nbits from modules and databits from GeomSettings	2015-03-26 23:27:37 +01:00
test	sdram: use names that are more explicit for bank_a, row_a,...: bankbits, rowbits, .... Add databits to GeomSettings.	2015-03-25 16:56:29 +01:00
__init__.py	sdram: remove nbits from modules and databits from GeomSettings	2015-03-26 23:27:37 +01:00
module.py	sdram: remove nbits from modules and databits from GeomSettings	2015-03-26 23:27:37 +01:00