litex/migen/bank
Sebastien Bourdeauducq 55a265d967 bank: add RE signal for registers made of fields 2012-02-17 23:52:06 +01:00
..
__init__.py Cleanup 2011-12-05 19:25:32 +01:00
csrgen.py bank: add RE signal for registers made of fields 2012-02-17 23:52:06 +01:00
description.py bank: add RE signal for registers made of fields 2012-02-17 23:52:06 +01:00
eventmanager.py Use double quotes for all strings 2012-02-14 13:12:43 +01:00