Sebastien Bourdeauducq 59831e0485 fhdl/structure: improved bits_for function		2012-11-28 18:39:44 +01:00
..
actorlib	actorlib/spi: do not use MemoryPort	2012-11-26 18:27:59 +01:00
bank	bank/description: regprefix	2012-10-15 21:21:59 +02:00
bus	bus/wishbone2asmi: do not use MemoryPort	2012-11-26 19:14:59 +01:00
corelogic	corelogic/ReorderBuffer: do not touch empty count when issuing and reading at the same time	2012-07-13 20:21:04 +02:00
fhdl	fhdl/structure: improved bits_for function	2012-11-28 18:39:44 +01:00
flow	fhdl: use object creation counter (HUID) as hash. This finally makes the generated code textually the same across runs.	2012-11-23 18:38:03 +01:00
pytholite	pytholite: fix import of _Slice	2012-11-23 21:20:18 +01:00
sim	sim/generic/multiread: do not return spurious items	2012-11-23 23:07:25 +01:00
uio	pytholite/io: support memory	2012-11-23 20:36:09 +01:00
__init__.py	Initial import, FHDL basic structure, divider example	2011-12-04 16:44:38 +01:00