Florent Kermarrec 5c1d980540 soc/interconnect/axi: add burst support to AXI2Wishbone		2019-04-29 16:49:20 +02:00
..
cores	cpu: use property methods to return name, endianness, gcc triple/flags, linker output format	2019-04-29 09:58:51 +02:00
integration	integration/soc_core: use cpu name as cpu-type for all cpus (mor1kx was instanciated with or1k)	2019-04-29 10:14:30 +02:00
interconnect	soc/interconnect/axi: add burst support to AXI2Wishbone	2019-04-29 16:49:20 +02:00
software	software/libnet/microudp: rearrange send_packet, add comments and remove txlen padding	2019-04-24 11:32:40 +02:00
__init__.py	litex: reorganize things, first work working version	2015-11-07 17:48:55 +01:00
MISOC_LICENSE	litex: reorganize things, first work working version	2015-11-07 17:48:55 +01:00