litex/litex
2020-12-21 16:11:45 +01:00
..
boards symbiflow: remove workarounds for symbiflow 2020-11-23 10:33:11 +01:00
build Quartus: handle vh and svh files 2020-12-20 11:53:08 +01:00
gen gen/fhdl/verilog: improve clock domain error reporting. 2020-11-10 13:27:29 +01:00
soc soc/interconnect/axi: fix AXIInterface.get_ios(). 2020-12-21 08:51:04 +01:00
tools tools/litex_json2dts: cleanup and reorganize peripherals. 2020-12-21 16:11:45 +01:00
__init__.py revert get_data_mod change (Vexrisv SMP repo has been renamed to pythondata-cpu-vexriscv_smp). 2020-11-05 19:55:18 +01:00