44 lines
1.4 KiB
Python
44 lines
1.4 KiB
Python
from migen.fhdl.structure import *
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from migen.fhdl.specials import Instance
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from migen.fhdl.module import Module
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from migen.bus import dfi
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class S6DDRPHY(Module):
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def __init__(self, a, ba, d):
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inst_items = [
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Instance.Parameter("NUM_AD", a),
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Instance.Parameter("NUM_BA", ba),
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Instance.Parameter("NUM_D", d),
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Instance.Input("sys_clk", ClockSignal()),
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Instance.Input("clk2x_270", ClockSignal("sys2x_270")),
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Instance.Input("clk4x_wr", ClockSignal("sys4x_wr")),
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Instance.Input("clk4x_rd", ClockSignal("sys4x_rd"))
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]
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for name, width, cl in [
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("clk4x_wr_strb", 1, Instance.Input),
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("clk4x_rd_strb", 1, Instance.Input),
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("sd_a", a, Instance.Output),
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("sd_ba", ba, Instance.Output),
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("sd_cs_n", 1, Instance.Output),
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("sd_cke", 1, Instance.Output),
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("sd_ras_n", 1, Instance.Output),
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("sd_cas_n", 1, Instance.Output),
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("sd_we_n", 1, Instance.Output),
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("sd_dq", d//2, Instance.InOut),
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("sd_dm", d//16, Instance.Output),
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("sd_dqs", d//16, Instance.InOut)
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]:
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s = Signal(width, name=name)
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setattr(self, name, s)
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inst_items.append(cl(name, s))
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self.dfi = dfi.Interface(a, ba, d, 2)
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inst_items += [Instance.Input(name, signal)
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for name, signal in self.dfi.get_standard_names(True, False)]
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inst_items += [Instance.Output(name, signal)
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for name, signal in self.dfi.get_standard_names(False, True)]
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self.specials += Instance("s6ddrphy", *inst_items)
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