Florent Kermarrec 60324295fa manage clock domain crossing and data width conversion in gtx		2014-09-24 13:56:12 +02:00
..
__init__.py	rearrange code and remove datapath for now	2014-09-23 23:03:32 +02:00
clocking.py	create sata clock (sata_tx/2 for a 32 bits data path)	2014-09-24 13:55:06 +02:00
ctrl.py	add device ctrl skeleton (we will use it for simulation with the host)	2014-09-24 11:37:28 +02:00
gtx.py	manage clock domain crossing and data width conversion in gtx	2014-09-24 13:56:12 +02:00
std.py	add ctrl skeleton	2014-09-24 00:01:01 +02:00