Alan Green 61be01ebd4 litex/soc: update API to avoid unfortunate terms ... Provides an alternate API to some functions of the SoCBusHandler and bus Arbiter classes to allow users of the API to avoid the terms 'master' and 'slave' in certain situations. Signed-off-by: Alan Green <alan.green@gmail.com>		2022-11-04 06:03:34 +11:00
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build	vhd2v: Use GHDL directly	2022-10-29 22:27:23 +10:30
compat	cores/spi_flash: Deprecate SPI Flash MMAPed cores (Designs have been switched with LiteSPI).	2022-01-07 19:08:03 +01:00
gen	litex/gen: Move LiteXModule to gen/fhdl/module.py.	2022-10-28 19:38:24 +02:00
soc	litex/soc: update API to avoid unfortunate terms	2022-11-04 06:03:34 +11:00
tools	tools/litex_read_verilog: Add proc step before exporting to .json since now seems to be required for some verilog designs.	2022-10-19 15:29:00 +02:00
__init__.py	get_data_mod: Update pip to pip3 to avoid issues on systems with Python2 still installed.	2021-09-28 16:27:13 +02:00