125 lines
5.2 KiB
Python
125 lines
5.2 KiB
Python
from mibuild.generic_platform import *
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from mibuild.xilinx import XilinxPlatform
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_io = [
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("clk100", 0, Pins("V10"), IOStandard("LVCMOS33")),
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("clk12", 0, Pins("D9"), IOStandard("LVCMOS33")),
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("serial", 0,
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Subsignal("tx", Pins("A8"), IOStandard("LVCMOS33"),
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Misc("SLEW=FAST")),
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Subsignal("rx", Pins("B8"), IOStandard("LVCMOS33"),
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Misc("SLEW=FAST"))),
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("spiflash", 0,
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Subsignal("cs_n", Pins("V3")),
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Subsignal("clk", Pins("R15")),
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Subsignal("mosi", Pins("T13")),
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Subsignal("miso", Pins("R13"), Misc("PULLUP")),
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IOStandard("LVCMOS33"), Misc("SLEW=FAST")),
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("ddram_clock", 0,
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Subsignal("p", Pins("G3")),
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Subsignal("n", Pins("G1")),
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IOStandard("MOBILE_DDR")),
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("ddram", 0,
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Subsignal("a", Pins("J7 J6 H5 L7 F3 H4 H3 H6 D2 D1 F4 D3 G6")),
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Subsignal("ba", Pins("F2 F1")),
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Subsignal("cke", Pins("H7")),
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Subsignal("ras_n", Pins("L5")),
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Subsignal("cas_n", Pins("K5")),
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Subsignal("we_n", Pins("E3")),
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Subsignal(
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"dq", Pins("L2 L1 K2 K1 H2 H1 J3 J1 M3 M1 N2 N1 T2 T1 U2 U1")
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),
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Subsignal("dqs", Pins("L4 P2")),
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Subsignal("dm", Pins("K3 K4")),
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IOStandard("MOBILE_DDR")),
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("dipswitch", 0, Pins("C17"), IOStandard("LVCMOS33"), Misc("PULLUP")),
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("dipswitch", 1, Pins("C18"), IOStandard("LVCMOS33"), Misc("PULLUP")),
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("dipswitch", 2, Pins("D17"), IOStandard("LVCMOS33"), Misc("PULLUP")),
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("dipswitch", 3, Pins("D18"), IOStandard("LVCMOS33"), Misc("PULLUP")),
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("dipswitch", 4, Pins("E18"), IOStandard("LVCMOS33"), Misc("PULLUP")),
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("dipswitch", 5, Pins("E16"), IOStandard("LVCMOS33"), Misc("PULLUP")),
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("dipswitch", 6, Pins("F18"), IOStandard("LVCMOS33"), Misc("PULLUP")),
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("dipswitch", 7, Pins("F17"), IOStandard("LVCMOS33"), Misc("PULLUP")),
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("buttonswitch", 0, Pins("K18"), IOStandard("LVCMOS33"), Misc("PULLUP")),
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("buttonswitch", 1, Pins("K17"), IOStandard("LVCMOS33"), Misc("PULLUP")),
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("buttonswitch", 2, Pins("L17"), IOStandard("LVCMOS33"), Misc("PULLUP")),
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("buttonswitch", 3, Pins("M16"), IOStandard("LVCMOS33"), Misc("PULLUP")),
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("buttonswitch", 4, Pins("L18"), IOStandard("LVCMOS33"), Misc("PULLUP")),
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("buttonswitch", 5, Pins("M18"), IOStandard("LVCMOS33"), Misc("PULLUP")),
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("user_led", 0, Pins("T18"), IOStandard("LVCMOS33"), Drive(8)),
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("user_led", 1, Pins("T17"), IOStandard("LVCMOS33"), Drive(8)),
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("user_led", 2, Pins("U18"), IOStandard("LVCMOS33"), Drive(8)),
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("user_led", 3, Pins("U17"), IOStandard("LVCMOS33"), Drive(8)),
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("user_led", 4, Pins("N16"), IOStandard("LVCMOS33"), Drive(8)),
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("user_led", 5, Pins("N15"), IOStandard("LVCMOS33"), Drive(8)),
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("user_led", 6, Pins("P16"), IOStandard("LVCMOS33"), Drive(8)),
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("user_led", 7, Pins("P15"), IOStandard("LVCMOS33"), Drive(8)),
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("mmc", 0,
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Subsignal("dat", Pins("K14 G18 J13 L13"), IOStandard("LVCMOS33"),
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Misc("SLEW=FAST")),
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Subsignal("cmd", Pins("G16"), IOStandard("LVCMOS33"),
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Misc("SLEW=FAST")),
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Subsignal("clk", Pins("L12"), IOStandard("LVCMOS33"),
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Misc("SLEW=FAST"))),
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("sevenseg", 0,
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Subsignal("segment7", Pins("A3"), IOStandard("LVCMOS33")), # A
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Subsignal("segment6", Pins("B4"), IOStandard("LVCMOS33")), # B
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Subsignal("segment5", Pins("A4"), IOStandard("LVCMOS33")), # C
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Subsignal("segment4", Pins("C4"), IOStandard("LVCMOS33")), # D
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Subsignal("segment3", Pins("C5"), IOStandard("LVCMOS33")), # E
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Subsignal("segment2", Pins("D6"), IOStandard("LVCMOS33")), # F
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Subsignal("segment1", Pins("C6"), IOStandard("LVCMOS33")), # G
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Subsignal("segment0", Pins("A5"), IOStandard("LVCMOS33")), # Dot
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Subsignal("enable0", Pins("B2"), IOStandard("LVCMOS33")), # EN0
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Subsignal("enable1", Pins("A2"), IOStandard("LVCMOS33")), # EN1
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Subsignal("enable2", Pins("B3"), IOStandard("LVCMOS33"))), # EN2
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("audio", 0,
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Subsignal("channel1", Pins("B16"), IOStandard("LVCMOS33"),
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Misc("DRIVE=8,SLEW=FAST")),
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Subsignal("channel2", Pins("A16"), IOStandard("LVCMOS33"),
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Misc("DRIVE=8,SLEW=FAST"))),
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("vga_out", 0,
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Subsignal("hsync", Pins("B12"), IOStandard("LVCMOS33"),
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Misc("DRIVE=8,SLEW=FAST")),
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Subsignal("vsync", Pins("A12"), IOStandard("LVCMOS33"),
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Misc("DRIVE=8,SLEW=FAST")),
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Subsignal("r", Pins("A9 B9 C9"), IOStandard("LVCMOS33"),
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Misc("DRIVE=8,SLEW=FAST")),
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Subsignal("g", Pins("C10 A10 C11"), IOStandard("LVCMOS33"),
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Misc("DRIVE=8,SLEW=FAST")),
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Subsignal("b", Pins("B11 A11"), IOStandard("LVCMOS33"),
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Misc("DRIVE=8,SLEW=FAST")))
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]
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_connectors = [
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("P6", "T3 R3 V5 U5 V4 T4 V7 U7"),
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("P7", "V11 U11 V13 U13 T10 R10 T11 R11"),
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("P8", "L16 L15 K16 K15 J18 J16 H18 H17")
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]
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class Platform(XilinxPlatform):
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default_clk_name = "clk100"
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default_clk_period = 10
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def __init__(self):
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XilinxPlatform.__init__(self, "xc6slx9-csg324-2", _io, _connectors)
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def create_programmer(self):
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raise NotImplementedError
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