litex/test
2024-07-20 15:45:44 +10:00
..
__init__.py
test_avalon_mm.py
test_axi.py soc/test: Make data_width/address_width/addressing explicit on Wishbone.Interface calls. 2023-10-27 10:55:13 +02:00
test_axi_lite.py
test_axi_stream.py
test_bitbang.py
test_clock.py
test_code_8b10b.py
test_cpu.py
test_csr.py csr_bus: Honour re signal from the upstream bus 2024-06-23 19:35:19 +01:00
test_ecc.py
test_emif.py
test_fifosyncmacro.py
test_gearbox.py inteconnect/stream: Increase io_lcm size when io_lcm/i_dw or io_lcm/o_dw < 2. 2021-03-18 13:47:10 +01:00
test_hyperbus.py
test_i2c.py
test_i2s.py
test_icap.py
test_led.py
test_packet.py
test_prbs.py
test_reduce.py
test_spi.py
test_spi_mmap.py
test_spi_opi.py
test_stream.py
test_timer.py
test_wishbone.py