litex/migen/bus
2013-05-22 17:11:09 +02:00
..
__init__.py CSR bus definitions 2011-12-05 00:16:44 +01:00
asmibus.py New migen.fhdl.std to simplify imports + len->flen 2013-05-22 17:11:09 +02:00
csr.py New migen.fhdl.std to simplify imports + len->flen 2013-05-22 17:11:09 +02:00
dfi.py New migen.fhdl.std to simplify imports + len->flen 2013-05-22 17:11:09 +02:00
memory.py New migen.fhdl.std to simplify imports + len->flen 2013-05-22 17:11:09 +02:00
transactions.py New migen.fhdl.std to simplify imports + len->flen 2013-05-22 17:11:09 +02:00
wishbone.py New migen.fhdl.std to simplify imports + len->flen 2013-05-22 17:11:09 +02:00
wishbone2asmi.py New migen.fhdl.std to simplify imports + len->flen 2013-05-22 17:11:09 +02:00
wishbone2csr.py New migen.fhdl.std to simplify imports + len->flen 2013-05-22 17:11:09 +02:00