enjoy-digital 7286f95f55 Merge pull request #1125 from fjullien/efinix_add_bank_voltage ... efinix: add io bank voltage configuration		2021-12-09 14:26:33 +01:00
..
build	efinix: add io bank voltage configuration	2021-12-08 18:04:11 +01:00
compat	soc/add_spi_flash: Move integration code for previous LiteX SPI Flash core to compat/soc_add_spi_flash.py.	2021-07-29 18:48:03 +02:00
gen	fhdl/verilog: Fix sig.direction regression.	2021-10-31 23:40:11 +01:00
soc	cores/cpu: add initial Gowin EMCU support	2021-12-08 23:51:57 +01:00
tools	tools/litex_client: Add --length parameter for MMAP read accesses.	2021-10-22 09:07:19 +02:00
__init__.py	get_data_mod: Update pip to pip3 to avoid issues on systems with Python2 still installed.	2021-09-28 16:27:13 +02:00