81 lines
2.5 KiB
Plaintext
81 lines
2.5 KiB
Plaintext
__ _ __ _ __
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/ / (_) /____ | |/_/
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/ /__/ / __/ -_)> <
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/____/_/\__/\__/_/|_|
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Migen inside
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Build your hardware, easily!
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Copyright 2012-2016 Enjoy-Digital
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[> Intro
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--------
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LiteX is an alternative to Migen/MiSoC maintained and used by Enjoy-Digital
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to build our cores, integrate them in complete SoC and load/flash them to
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the hardware and experiment new features.
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The structure of LiteX is kept close to Migen/MiSoC to ease collaboration
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between projects and efforts are made to keep cores developed with LiteX
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compatible with Migen/MiSoC.
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[> License
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----------
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LiteX is Copyright (c) 2012-2015 Enjoy-Digital under BSD Lisense.
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Since it is based on Migen/MiSoC, please also refer to LICENSE file in gen/soc
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directory or git history to get correct copyrights.
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[> Sub-packages
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---------------
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gen:
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Provides specific or experimentatl modules to generate HDL that are not integrated
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in Migen.
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build:
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Provides tools to build FPGA bitstreams (interface to vendor toolchains) and to
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simulate HDL code or full SoCs.
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soc:
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Provides definitions/modules to build cores (bus, bank, flow), cores and tools
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to build a SoC from such cores.
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boards:
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Provides platforms and targets for the supported boards.
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[> Quick start guide
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--------------------
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0. If cloned from Git without the --recursive option, get the submodules:
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git submodule update --init
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1. Install Python 3.3+, Migen and FPGA vendor's development tools and JTAG tools.
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Get Migen from: https://github.com/m-labs/migen
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2. Compile and install binutils. Take the latest version from GNU.
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mkdir build && cd build
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../configure --target=lm32-elf
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make
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make install
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3. (Optional, only if you want to use a lm32 CPU in you SoC)
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Compile and install GCC. Take gcc-core and gcc-g++ from GNU
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(version 4.5 or >=4.9).
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rm -rf libstdc++-v3
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mkdir build && cd build
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../configure --target=lm32-elf --enable-languages="c,c++" --disable-libgcc \
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--disable-libssp
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make
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make install
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4. Build the target of your board...:
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Go to boards/targets and execute the target you want to build
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5. ... and/or install Verilator and test LiteX on your computer:
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Download and install Verilator: http://www.veripool.org/
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Install libevent-devel / json-c-devel packages
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Go to boards/targets
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./sim.py
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6. Run a terminal program on the board's serial port at 115200 8-N-1.
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You should get the BIOS prompt.
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[> Contact
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----------
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E-mail: florent [AT] enjoy-digital.fr |