26 lines
557 B
Makefile
26 lines
557 B
Makefile
SOURCES=tb_s6ddrphy.v ../../verilog/s6ddrphy/s6ddrphy.v \
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$(XILINX)/verilog/src/unisims/ODDR2.v \
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$(XILINX)/verilog/src/unisims/OSERDES2.v \
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$(XILINX)/verilog/src/unisims/ISERDES2.v \
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$(XILINX)/verilog/src/unisims/IOBUF.v \
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$(XILINX)/verilog/src/unisims/OBUFT.v \
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$(XILINX)/verilog/src/unisims/BUFPLL.v
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RM ?= rm -f
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all: tb_s6ddrphy
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isim: tb_s6ddrphy
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./tb_s6ddrphy
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cversim: $(SOURCES)
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cver $(SOURCES)
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clean:
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$(RM) tb_s6ddrphy verilog.log s6ddrphy.vcd
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tb_s6ddrphy: $(SOURCES)
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iverilog -o tb_s6ddrphy $(SOURCES)
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.PHONY: all clean isim cversim
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