Hardware/litex
1
0
Fork 0
mirror of https://github.com/enjoy-digital/litex.git synced 2025-01-04 09:52:26 -05:00
Code Issues Projects Releases Packages Wiki Activity
litex/migen/bus
History
Sebastien Bourdeauducq f9acee4e68 corelogic -> genlib
2013-02-22 23:19:37 +01:00
..
__init__.py
asmibus.py corelogic -> genlib 2013-02-22 23:19:37 +01:00
csr.py New 'specials' API 2013-02-22 17:56:35 +01:00
dfi.py Remove Constant 2012-11-28 23:18:43 +01:00
memory.py bus: memory initiator 2012-11-23 16:22:50 +01:00
simple.py corelogic -> genlib 2013-02-22 23:19:37 +01:00
transactions.py
wishbone.py corelogic -> genlib 2013-02-22 23:19:37 +01:00
wishbone2asmi.py corelogic -> genlib 2013-02-22 23:19:37 +01:00
wishbone2csr.py corelogic -> genlib 2013-02-22 23:19:37 +01:00