Florent Kermarrec 8316fbf14b build/efinix/common: Fix EfinixAsyncResetSynchronizerImpl. ... SR_VALUE is set to 0 by default and needs to be set to 1.		2021-10-13 16:31:47 +02:00
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build	build/efinix/common: Fix EfinixAsyncResetSynchronizerImpl.	2021-10-13 16:31:47 +02:00
compat	soc/add_spi_flash: Move integration code for previous LiteX SPI Flash core to compat/soc_add_spi_flash.py.	2021-07-29 18:48:03 +02:00
gen	gen/fhdl/memory: Fix dual clock memory pattern (previous pattern is no longer supported by Yosys), thanks @gregdavill.	2021-10-13 11:33:43 +02:00
soc	build/efinix: Move tweaked Memory to build/efinix for now.	2021-10-13 09:51:47 +02:00
tools	Merge pull request #1053 from rdolbeau/fb_rgb565	2021-10-08 14:15:10 +02:00
__init__.py	get_data_mod: Update pip to pip3 to avoid issues on systems with Python2 still installed.	2021-09-28 16:27:13 +02:00