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litex/mibuild
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Florent Kermarrec 84eb146e0a kc705: add ddram pins 2014-07-28 21:35:18 -06:00
..
platforms kc705: add ddram pins 2014-07-28 21:35:18 -06:00
__init__.py merge Mibuild into Migen 2013-11-23 10:45:15 +01:00
altera_quartus.py mibuild: use SimpleCRG instead of CRG_SE, remove period parameter for CRG_DS, clean up platforms 2014-06-20 17:29:29 +02:00
crg.py merge Mibuild into Migen 2013-11-23 10:45:15 +01:00
generic_platform.py mibuild/generic_platform.py: adding ability to use void pins (none fpga pin) for connectors 2014-07-09 10:41:51 +02:00
tools.py mibuild.xilinx_vivado: support settingsXX.sh 2014-07-27 19:50:15 -06:00
xilinx_common.py mibuild: use SimpleCRG instead of CRG_SE, remove period parameter for CRG_DS, clean up platforms 2014-06-20 17:29:29 +02:00
xilinx_ise.py mibuild.xilinx_vivado: support settingsXX.sh 2014-07-27 19:50:15 -06:00
xilinx_tools.py mibuild.xilinx_vivado: support settingsXX.sh 2014-07-27 19:50:15 -06:00
xilinx_vivado.py mibuild.xilinx_vivado: support settingsXX.sh 2014-07-27 19:50:15 -06:00