litex/litex
William D. Jones 86ef4e95a5 Add option in Makefile for (s)ccache support. 2021-10-29 21:04:05 -04:00
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build efinix/efinity: Remove spi_low_power_mode (Prevents BIOS XiP). 2021-10-22 10:41:42 +02:00
compat soc/add_spi_flash: Move integration code for previous LiteX SPI Flash core to compat/soc_add_spi_flash.py. 2021-07-29 18:48:03 +02:00
gen fhdl/verilog: Fix regression introduced in to_signed function. 2021-10-15 21:46:42 +02:00
soc Add option in Makefile for (s)ccache support. 2021-10-29 21:04:05 -04:00
tools tools/litex_client: Add --length parameter for MMAP read accesses. 2021-10-22 09:07:19 +02:00
__init__.py get_data_mod: Update pip to pip3 to avoid issues on systems with Python2 still installed. 2021-09-28 16:27:13 +02:00